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MC54HC589

Features: • Output Drive Capability: 15 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2 to 6 V• Low Input Current: 1 mA• High Noise Immunity Characteristic of CMOS Devices• In Compliance with the Requirements Defined by...

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MC54HC589: Features: • Output Drive Capability: 15 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2 to 6 V• Low Input Current: 1 mA• High...

MC54HC589 Data Sheet

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MC54HC589
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Product Details

Description



Features:

• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 526 FETs or 131.5 Equivalent Ga


Pinout

Connection Diagram


Specifications

Symbol Parameter Value Unit
vcc DC Supply Voltage (Referenced to GND) 0.5 to +7.0 V
VIN DC Input Voltage (Referenced to GND) 0.5 to VCC + 0.5 V
VOUT DC Output Voltage (Referenced to GND) 0.5 to VCC + 0.5 V
LIN DC Input Current, per Pin ±20 mA
IOUT DC Onput Current, per Pin ±35 mA
ICC DC Supply Current Per Supply Pin ±75 mA
PD Power dissipation in still air piastic DIP
SOIC package
750
500
 mW
TSTG Storage Temperature 65 to +150 °C
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)		 260 °C
* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating - Plastic DIP: 10 mW/C from 65 to 125C
Ceramic DIP: 10 mW/C from 100 to 125C
SOIC Package: 7 mW/C from 65 to 125C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).


Description

The MC54/74HC589 is similar in function to the HC597, which is not a 3state device. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LSTTL outputs.

MC54/74HC589 consists of an 8bit storage latch which feeds parallel data to an 8bit shift register. Data can also be loaded serially (see Function Table). The shift register output, QH, is a threestate output, allowing MC54/74HC589 to be used in busoriented systems.

The MC54/74HC589 directly interfaces with the Motorola SPI serial data port on CMOS MPUs and MCUs.




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