Features: • Serial-to-Parallel Conversion• Eight Bits of Storage with Output of Each Bit Available• Random (Addressable) Data Entry• Active High Demultiplexing or Decoding Capability• Easily Expandable• Common ClearPinoutDescriptionThe MC54/74F259 is a high-spee...
MC54F259: Features: • Serial-to-Parallel Conversion• Eight Bits of Storage with Output of Each Bit Available• Random (Addressable) Data Entry• Active High Demultiplexing or Decoding Ca...
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PinoutDescriptionThe F373 contains eight D-type latches with 3-state output buffers. When the Latc...
PinoutDescriptionThe F374 consists of eight edge-triggered flip-flops with individual D-type input...
The MC54/74F259 is a high-speed 8-bit addressable latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable of storing single line data in eight addressable latches, and also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The MC54/74F259 also incorporates an active LOW Common Clear for resetting all latches, as well as an active LOW Enable.
The MC54/74F259 has four modes of operation as shown in the Mode Select Table. In the addressable latch mode, data on the Data line (D) is written into the addressed latch. The addressed latch will follow the data input with all non-addressed latches remaining in their previous states in the memory mode. All the latches of MC54/74F259 remain in their previous state and are unaffected by the Data or Address inputs.
In the one-of-eight decoding or demultiplexing mode, the addressed output will follow the state of the D input with all other outputs in the LOW state. In the clear mode all outputs are LOW and unaffected by the address and data inputs. When operating the MC54/74F259 as an addressable latch, changing more than one bit of the address could impose a transient wrong address. Therefore, MC54/74F259 should only be done while in the memory mode. The Truth Table below summarizes the operations of the MC54/74F259.