MC14510B

Features: • Diode Protection on All Inputs• Supply Voltage Range = 3.0 Vdc to 18 Vdc• Internally Synchronous for High Speed• Logic EdgeClocked Design - Count Occurs on Positive Going Edge of Clock• Asynchronous Preset Enable Operation• Capable of Driving Two Low...

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SeekIC No. : 004415374 Detail

MC14510B: Features: • Diode Protection on All Inputs• Supply Voltage Range = 3.0 Vdc to 18 Vdc• Internally Synchronous for High Speed• Logic EdgeClocked Design - Count Occurs on Positi...

floor Price/Ceiling Price

Part Number:
MC14510B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Internally Synchronous for High Speed
• Logic EdgeClocked Design - Count Occurs on Positive Going Edge of Clock
• Asynchronous Preset Enable Operation
• Capable of Driving Two Lowpower TTL Loads or One Lowpower Schottky TTL Load Over the Rated
   Temperature Range.



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage
0.5 to + 18.0
V
Vin, Vout
Input or Output Voltage (DC or Transient)
0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current (DC or Transient),
per Pin
± 10
mA
PD
Power Dissipation, per Package†
500
mW
Tstg
Storage Temperature
65 to + 150
TL
Lead Temperature (8Second Soldering)
260
* Maximum Ratings are those values beyond which damage to the may occur.

†Temperature Derating:
   Plastic "P and D/DW" Packages: 7.0 mW/ From 65 To 125
   Ceramic "L" Packages: 12 mW/ From 100 To 125


Description

The MC14510B synchronous up/down BCD counter is constructed with MOS Pchannel and Nchannel enhancement mode devices in a monolithic structure. The MC14510B consists of type D flipflop stages with a gating structure to provide type T flipflop capability.

MC14510B can be preset by applying the desired value in BCD to the Preset inputs (P1, P2, P3, P4) and then bringing the Preset Enable (PE) high. The direction of counting is controlled by applying a high (for up counting) or a low (for down counting) to the UP/DOWN input. The state of the counter changes on the positive transition of the clock input.

Cascading can be accomplished by connecting the Carry Out to the Carry In of the next stage while clocking each counter in parallel. The outputs (Q1, Q2, Q3, Q4) can be reset to a low state by applying a high to the Reset (R) pin.

This CMOS counter MC14510B finds primary use in up/down and difference counting. Other applications of MC14510B include: (1) Frequency synthesizer applications where low power dissipation and/or high noise immunity is desired, (2) Analogto digital and digitaltoanalog conversions, and (3) Magnitude and sign generation.




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