MC14076B

Application* ThreeState Outputs with Gated Control Lines* Fully Independent Clock Allows Unrestricted Operation for the Two Modes: Parallel Load and Do Nothing* Asynchronous Master Reset* Four Bus Buffer Registers* Supply Voltage Range = 3.0 Vdc to 18 Vdc* Capable of Driving Two LowPower TTL Loads...

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SeekIC No. : 004415293 Detail

MC14076B: Application* ThreeState Outputs with Gated Control Lines* Fully Independent Clock Allows Unrestricted Operation for the Two Modes: Parallel Load and Do Nothing* Asynchronous Master Reset* Four Bus B...

floor Price/Ceiling Price

Part Number:
MC14076B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Application

* ThreeState Outputs with Gated Control Lines
* Fully Independent Clock Allows Unrestricted Operation for the Two Modes: Parallel Load and Do Nothing
* Asynchronous Master Reset
* Four Bus Buffer Registers
* Supply Voltage Range = 3.0 Vdc to 18 Vdc
* Capable of Driving Two LowPower TTL Loads or One LowPower Schottky TTL Load Over the Rated Temperature Range



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VDD DC Supply Voltage Range 0.5 to +18.0 V
Vin,Vout
Input or Output Voltage Range(DC or Transient) 0.5 to VDD + 0.5
V
Iin,Iout
Input or Output Current(DC or Transient)per Pin ±10 mA
PD Power Dissipation, per Package (Note 3.) 500 mW
TA Ambient Temperature Range 55 to +125
Tstg Storage Temperature Range 65 to +150
TL Lead Temperature(8Second Soldering) 260



Description

The MC14076B 4Bit Register consists of four Dtype flipflops operating synchronously from a common clock. OR gated outputdisable inputs force the outputs into a highimpedance state for use in bus organized systems. OR gated datadisable inputs cause the Q outputs to be fed back to the D inputs of the flipflops. Thus MC14076B is inhibited from changing state while the clocking process remains undisturbed. An asynchronous master root is provided to clear all four flipflops simultaneously independent of the clock or disable inputs.


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