MC10EP14

* Maximum Ratings are those values beyond which damage to the device may occur.  Use for inputs of same package only.

The MC10EP14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications.

The MC10EP14 can be driven by either a differential or singleended ECL or, if positive power supplies are used, PECL input signal. The EP14 is functionally and pin compatible with the EL14 and LVEL14 but is designed to operate
in ECL or PECL mode for a voltage supply range of 3.0V to 5.5V (or 3.0V to 5.5V). If a singleended input is to be
used the V_BB output should be connected to the CLK input and bypassed to ground via a 0.01F capacitor. The V_BB
output of MC10EP14 is designed to act as the switching reference for the input of the EP14 under singleended input conditions.

The MC10EP14 features a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along
with the high speed system clock. When LOW (or left open and pulled LOW by the input pulldown resistor) the SEL
pin will select the differential clock input.

The common enable (EN)of MC10EP14 is synchronous so that the outputs will only be enabled/disabled when they are already in
the LOW state. This avoids any chance of generating a runt clock pulse when the MC10EP14 is enabled/disabled as can
happen with an asynchronous control. The internal flipflop is clocked on the falling edge of the input clock, therefore
all associated specification limits are referenced to the negative edge of the clock input.