MC10ELT21

Features:

• 3.5ns Typical Propagation Delay
• Differential PECL Inputs
• Small Outline SOIC Package
• 24mA TTL Output
• Flow Through Pinouts


Pinout




Specifications

Symbol	Parameter	Value	Unit
VCC	DC Supply Voltage (Referenced to GND)	7.0	V
TA	Operating Temperature Range (In Free-Air)	40 to 85
TSTG	Storage Temperature Range	55 to +150

` Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.


Description

The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of the ELT21 makes MC10ELT/100ELT21 ideal for those applications where space, performance and low power are at a premium. Because the mature MOSAIC 1.5 process is used, low cost can be added to the list of features.

The V_BB output allows the ELT21 to also be used in a single-ended input mode. In MC10ELT/100ELT21 the VBB output is tied to the IN input for a non-inverting buffer or the IN input for an inverting buffer. If used the V_BB pin should be bypassed to ground via a 0.01mF capacitor.

The ELT21 is available in both ECL standards: the 10ELT is compatible with positive MECL 10H logic levels while the 100ELT is compatible with positive ECL 100K logic levels.