Features: • 2.0ns Typical Propagation Delay• Differential LVPECL Inputs• Small Outline SOIC Package• 24mA TTL Outputs• Flow Through Pinouts• ESD Performance: Human Body Model 1200V; Machine Model 150VPinoutSpecifications Symbol Parameter Value Unit VC...
MC100LVELT23: Features: • 2.0ns Typical Propagation Delay• Differential LVPECL Inputs• Small Outline SOIC Package• 24mA TTL Outputs• Flow Through Pinouts• ESD Performance: Huma...
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Counter Shift Registers 5V ECL 8-Bit Binary Up Synchronous
Symbol | Parameter | Value | Unit |
VCC | DC Supply Voltage (Referenced to GND) | 0.5 to +3.8 | V |
TA | Operating Temperature Range | 40 to +85 | °C |
Tstg | Storage Temperature Range | 55 to +150 |
°C |
Q | Thermal Resistnace Through Package (No Air Flow) | 130 | °C/W |
The MC100LVELT23 is a dual differential LVPECL to TTL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the LVELT23 makes MC100LVELT23 ideal for applications which require the translation of a clock and a data signal.
The MC100LVELT23 is available in only the ECL 100K standard. Since there are no LVPECL outputs or an external VBB reference, the LVELT23 does not require both ECL standard versions. The LVPECL inputs are differential; there is no specified difference between the differential input 10H and 100K standards. Therefore, the MC100LVELT23 can accept any standard differential LVPECL input referenced from a VCC of 3.3V.