PinoutDescriptionThe MC10H/100H646 is a single supply, low skew translating 1:8 clock driver. MC10H/100H646 in the Motorola H600 translator series utilize the 28lead PLCC for optimal power pinning, signal flow through and electrical performance. The single supply H646 is similar to the H643, which...
MC100H646: PinoutDescriptionThe MC10H/100H646 is a single supply, low skew translating 1:8 clock driver. MC10H/100H646 in the Motorola H600 translator series utilize the 28lead PLCC for optimal power pinning, ...
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Counter Shift Registers 5V ECL 8-Bit Binary Up Synchronous
The MC10H/100H646 is a single supply, low skew translating 1:8 clock driver. MC10H/100H646 in the Motorola H600 translator series utilize the 28lead PLCC for optimal power pinning, signal flow through and electrical performance. The single supply H646 is similar to the H643, which is a dual supply 1:8 version of the same function.
• PECL/TTLTTL Version of Popular ECLinPSE E111
• Low Skew
• Guaranteed Skew Spec
• TriState Enable
• Differential Internal Design
• VBB Output
• Single Supply
• Extra TTL and ECL Power/Ground Pins
• Matched High and Low Output Impedance
• Meets Specifications Required to Drive the Pentium™Microprocessor
The MC10H/100H646 was designed specifically to drive series terminated transmission lines. Special techniques were used to match the HIGH and LOW output impedances to about 7ohms. This simplifies the choice of the termination resistor for series terminated applications. To match the HIGH and LOW output impedances, MC10H/100H646 was necessary to remove the standard IOS limiting resistor. As a result, the user should take care in preventing an output short to ground as the part will be permanently damaged.
The MC10H/100H646 device meets all of the requirements for driving the 60 and 66MHz Pentium Microprocessor. The MC10H/100H646 has no PLL components, which greatly simplifies its implementation into a digital design. The eight copies of the clock allows for pointtopoint clock distribution to simplify board layout and optimize signal integrity. The MC10H/100H646 provides differential PECL inputs for picking up LOW skew PECL clocks from the backplane and distributing it to TTL loads on a daughter board. When used in conjunction with the MC10/100E111, very low skew, very wide clock trees can be designed. In addition, a TTL level clock input is provided for flexibility. Note that only one of the inputs can be used on a single chip. For correct operation, the unused input pins should be left open.
The Output Enable pin of MC10H/100H646 forces the outputs into a high impedance state when a logic 0 is applied.
The output buffers of the MC10H/100H646 can drive two series terminated, 50W transmission lines each. This capability allows the H646 to drive up to 16 different pointtopoint clock loads. Refer to the Applications section for a more detailed discussion in this area.
The MC10H/100H646 version is compatible with MECL 10HE ECL logic levels. The 100H version is compatible with 100K levels.