MC100H607

Features:

•Differential ECL Data and Clock Inputs
•48mA Sink, 15mA Source TTL Outputs
•Single Power Supply
•Multiple Power and Ground Pins to Minimize Noise


Pinout




Specifications

100H PECL DC CHARACTERISTICS (VCCT= VCCE= 5.0V ±5%)
Symbol	Characteristic	TA= 0°C		TA= 25°C		TA= 85°C		Unit	Condition
		Min	Max	Min	Max	Min	Max
IINH	Input HIGH Current		255		145		145	µA
IINL	Input LOW Current		0.5		0.5		0.5	µA
VIH	Input HIGH Voltage	3835	4120	3835	4120	3835	4120	mV	VCCT= 5.0V
VIL	Input LOW Voltage	3190	3525	3190	3525	3190	3525	mV	VCCT= 5.0V
VBB	Output Bias Voltage	3600	3720	3600	3720	3600	3720	mV	VCCT= 5.0V

Description

  The MC10H/100H607 is a 6bit, registered PECL to TTL translator.The MC10H/100H607 features differential PECL inputs for both data and clock. The TTL outputs feature 48mA sink, 24mA source drive capability for driving high fanout loads or transmission lines. The asynchronous master reset control is an ECL level input.

  With its differential PECL inputs and TTL outputs the MC10H/100H607 device is ideally suited for the receive function of a HPPI bus type boardtoboard interface application. The on chip registers simplify the task of synchronizing the data between the two boards.

   The MC10H/100H607 is available in either ECL standard: the 10H device is compatible with MECL 10H logic levels, with a VCC of +5.0 volts, while the 100H device is compatible with 100K logic levels,  with a VCC of +5.0 volts.