MC100ES8223

The MC100ES8223 uses a thermally enhanced exposed pad (EP) 64 lead LQFP package. The package is molded so that the leadframe is exposed at the surface of the package bottom side. The exposed metal pad will provide the low
thermal impedance that supports the power consumption of the MC100ES8223 high-speed bipolar integrated circuit and eases the power management task for the system design. A thermal land pattern on the printed circuit board and thermal vias are recommended in order to take advantage of the enhanced thermal capabilities of the MC100ES8223. Direct soldering of the exposed pad to the thermal land will provide an efficient thermal path. In multilayer board designs, thermal vias thermally connect the exposed pad to internal copper planes. Number of vias, spacing, via diameters and land pattern design depend on the application and the amount of heat to be removed from the package. A nine thermal via array, arranged in a 3 x 3 array and using a 1.2 mm pitch in the center of the thermal land is the absolute minimum requirement for MC100ES8223 applications on multi-layer boards. The recommended thermal land design comprises a 5 x 5 thermal via array as shown in Figure 6."Recommended thermal land pattern", providing an efficient heat removal path.

The via diameter is should be approx. 0.3 mm with 1 oz.copper via barrel plating. Solder wicking inside the via resulting in voids during the solder process must be avoided.If the copper plating does not plug the vias, stencil print solder paste onto the printed circuit pad. This will supply enough solder paste to fill those vias and not starve the solder joints. The attachment process for exposed pad package is equivalent to standard surface mount packages. Figure 7. "Recommended solder mask openings" shows a recommend solder mask opening with respect to the recommended 5 x 5 thermal via array. Because a large solder mask opening may result in a poor release, the opening
should be subdivided as shown in Figure 7. For the nominal package standoff 0.1 mm, a stencil thickness of 5 to 8 mils
should be considered.

The Motorola MC100ES8223 is a bipolar monolithic differential clock fanout buffer. Designed for the most demanding clock distribution systems, the MC100ES8223 supports various applications that require the distribution of precisely aligned differential clock signals. Using SiGe technology and a fully differential architecture, the device offers very low skew outputs and superior digital signal characteristics. Target applications for this clock driver are high performance clock distribution in computing, networking and telecommunication systems.