Features: • 450 ps Typical Propagation Delay• Maximum Frequency > 1.5 GHz Typical• PECL Mode• Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V• PNP LVTTL Inputs for Minimal Loading• Q Output Will Default HIGH with Inputs Open• The 100 Series Contain...
MC100EPT622: Features: • 450 ps Typical Propagation Delay• Maximum Frequency > 1.5 GHz Typical• PECL Mode• Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V• PNP LVTTL Inputs ...
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Counter Shift Registers 5V ECL 8-Bit Binary Up Synchronous
Symbol |
Parameter |
Condition 1 |
Condition 2 |
Rating |
Unit |
VCC |
Power Supply | VEE = 0 V | 5 |
V |
|
VI |
Input Voltage | VEE = 0 V | 5 TO 0 |
V |
|
Iout |
Output Current | Continuous Surge |
VI VCC |
50 100 |
mA mA |
TA |
Operating Temperature Range | -40 to + 85 |
|||
Istg |
Storage Temperature Range | -65 to +150 |
|||
JA |
Thermal Resistance (Junction−to−Ambient) | 0 lfpm 500 lfpm |
32 LQFP 32 LQFP |
80 55 |
/W /W |
JC |
Thermal Resistance (Junction−to−Case) | std bd | 32 LQFP |
12 to 17 |
/W |
Tsol |
Wave Solder | <2 to 3 sec @ 248°C | 265 |
The MC100EPT622 is a 10-Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL (Positive ECL) levels are used only +3.3 V and ground are required. The device has an OR- ed enable input which can accept either LVPECL (ENPECL) or TTL/LVCMOS inputs (ENTTL). If the inputs are left open, they will default to the enable state. The device design has been optimized for low channel- to- channel skew