MC100EPT21 Selling Leads, Price trend, MC100EPT21 DataSheet download, circuit diagram from SeekIC.com

Features: • 1.4 ns Typical Propagation Delay• Maximum Frequency > 275 MHz Typical• 24 mA TTL outputs• Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V• Open Input Default State• Q Output Will Default LOW with Inputs Open or at GND• The 100 Series Co...

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SeekIC No. : 004414794 Detail

MC100EPT21: Features: • 1.4 ns Typical Propagation Delay• Maximum Frequency > 275 MHz Typical• 24 mA TTL outputs• Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V• Open Inpu...

MC100EPT21 Data Sheet

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Part Number:: MC100EPT21
Supply Ability:: 5000

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Product Details

Description

Features:

• 1.4 ns Typical Propagation Delay
• Maximum Frequency > 275 MHz Typical
• 24 mA TTL outputs
• Operating Range: V_CC = 3.0 V to 3.6 V with GND = 0 V
• Open Input Default State
• Q Output Will Default LOW with Inputs Open or at GND
• The 100 Series Contains Temperature Compensation
• V_BB Output
• New Differential Input Common Mode Range
• Pb−Free Packages are Available

Pinout

Connection Diagram

Specifications

Symbol	Parameter	Condition 1	Condition 2	Rating	Units
V_CC	Positive Power Supply	V_EE = 0 V		3.6	V
V_IN	PECL Input Voltage	V_EE = 0 V	V_IV_CC	0 to 3.8	V
V_BB	V_BBSink/Source			± 0.5	V
_JA	Thermal Resistance (Junction−to−Ambient)	0 lfpm 500 lfpm	SO−8 SO−8	190 130	°C/W °C/W
_JC	Thermal Resistance (Junction−to−Case)	Standard Board	SO−8	41 to 44	°C/W
T_A	Operating Temperature Range			−40 to +85	°C
T_stg	Storage Temperature Range			41 to 44	°C
_JA	Thermal Resistance (Junction−to−Ambient) (Note 4)	0 lfpm 500 lfpm	TSSOP−8 TSSOP−8	185 140	°C/W °C/W
_JC	Thermal Resistance (Junction−to−Case)	Standard Board	TSSOP−8	41 to 44	°C/W
T_sol	Wave Solder	< 3 Sec @ 248°C		265	°C

Description

The MC100EPT21 is a Differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used only +3.3 V and ground are required. The small outline 8−lead SOIC package makes the EPT21 ideal for applications which require the translation of a clock or data signal.

The V_BB output allows this MC100EPT21 to be cap coupled in either single−ended or differential input mode. When single−ended cap coupled, VBB output is tied to the D input and D is driven for a non−inverting buffer, or V_BB output is tied to the D input and D is driven for an inverting buffer. When cap coupled differentially, V_BB output is connected through a resistor to each input pin. If used, the V_BB pin should be bypassed to V_CC via a 0.01 F capacitor. For additional information see MC100EPT21. For a single−ended direct connection use an external voltage reference source such as a resistor divider. Do not use V_BB for a single−ended direct connection or port to another device.

MC100EPT21

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