Features: •350 ps Typical Propagation Delay•Maximum Frequency > 4 GHz Typical (Figure 3)•PECL Mode Operating Range:VCC= 3.0 V to 5.5 V with VEE= 0 V•NECL Mode Operating Range:VCC= 0 V with VEE= −3.0 V to −5.5 V•Open Input Default State•Safety Clam...
MC100EP32: Features: •350 ps Typical Propagation Delay•Maximum Frequency > 4 GHz Typical (Figure 3)•PECL Mode Operating Range:VCC= 3.0 V to 5.5 V with VEE= 0 V•NECL Mode Operating Ra...
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Counter Shift Registers 5V ECL 8-Bit Binary Up Synchronous
•350 ps Typical Propagation Delay
•Maximum Frequency > 4 GHz Typical (Figure 3)
•PECL Mode Operating Range:VCC= 3.0 V to 5.5 V with VEE = 0 V
•NECL Mode Operating Range:VCC= 0 V with VEE= −3.0 V to −5.5 V
•Open Input Default State
•Safety Clamp on Inputs
•Q Output Will Default LOW with Inputs Open or at VEE
•Pb−Free Package is Available
Symbol |
Parameter |
Condition 1 |
Condition 2 |
Rating |
Unit |
VCC | PECL Mode Power Supply | VEE=OV | 6 | V | |
VEE | NECL Mode Power Supply | VCC=OV | -6 | V | |
VI | PECL Mode Input Voltage NECL Mode Input Voltage |
VEE= 0 V VCC= 0 V |
VIVCC VIVCC |
6 −6 |
V V |
IOUT | Output Current | Continuous Surge |
50 100 |
mA mA | |
IBB | VBB Sink/Source |
± 0.5 |
mA | ||
TA | Operating Temperature Range | −40 to +85 | |||
TSTY | Storage Temperature Range | −65 to +150 | |||
0JA | Thermal Resistance (Junction−to−Ambient) | 0 lfpm 500 lfpm |
SOIC−8 SOIC−8 |
190 130 |
/W /W |
0JC | Thermal Resistance (Junction−to−Case) | Standard Board | SOIC−8 | 41 to 44 | /W |
0JA | Thermal Resistance (Junction−to−Ambient) | 0 lfpm 500 lfpm |
TSSOP−8 TSSOP−8 |
185 140 |
/W /W |
0JC | Thermal Resistance (Junction−to−Case) | Standard Board | TSSOP−8 | 41 to 44 | /W |
TSOL | Wave Solder | <2 to 3 sec @ 248 ° C |
265 |
The VBB pin, an internally generated voltage supply, is available to this MC100EP32 only. For single−ended input conditions, the unuseddifferential input is connected to VBB as a switching reference voltage.VBB may also rebias AC coupled inputs. When used, decouple VBBand VCC via a 0.01F capacitor and limit current sourcing or sinkingto 0.5 mA. When not used, VBB should be left open.
The reset pin is asynchronous and is asserted on the rising edge.Upon power−up, the internal flip−flops will attain a random state; thereset allows for the synchronization of multiple MC100EP32's in a system.
The 100 Series contains temperature compensation.