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MC100EP016

Features: •500 ps Typical Propagation Delay•PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE = 0 V•NECL Mode Operating Range: VCC = 0 V with VEE = 3.0 V to 5.5 V•Open Input Default State•Safety Clamp on Inputs•Internal TC Feedback (Gated)•Addition o...

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SeekIC No. : 004414755 Detail

MC100EP016: Features: •500 ps Typical Propagation Delay•PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE = 0 V•NECL Mode Operating Range: VCC = 0 V with VEE = 3.0 V to 5.5 V•Open ...

MC100EP016 Data Sheet

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Part Number:
MC100EP016
Supply Ability:
5000

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Product Details

Description



Features:

•500 ps Typical Propagation Delay
•PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE = 0 V
•NECL Mode Operating Range: VCC = 0 V with VEE = 3.0 V to 5.5 V
•Open Input Default State
•Safety Clamp on Inputs
•Internal TC Feedback (Gated)
•Addition of COUT and COUT
•8Bit
•Differential Clock Input
•VBB Output
•Fully Synchronous Counting and TC Generation
•Asynchronous Master Reset


Application

COUT and COUT
 provide differential outputs from a single,
noncascaded counter or divider application. COUT and COUT
should not be used in cascade configuration. Only TC
 should be used
for a counter or divider cascade chain output.
A differential clock input has also been added to improve
performance.


Pinout

Connection Diagram


Specifications

Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC PECL Mode Power Supply VEE= 0 V   6 V
VEE NECL Mode Power Supply VCC= 0 V   -6 V
VI PECL Mode Input Voltage
NECL Mode Input Voltage		 VEE= 0 V
VCC= 0 V

VIVCC

VIVEE

 6
-6		 V
V
IOUT Output Current Continuous
Surge		   50
100		 mA
mA
IBB VBBSink/Source     ±0.5 mA
TA Operating Temperature Range     -40 to +85
Tstg Storage Temperature Range     -65 to+150
0JA Thermal Resistance (Junction-to-Ambient) 0 LFPM
500 LFPM		 32 LQFP
32 LQFP		 80
55		 /W
/W
0JC Thermal Resistance (Junction-to-Case) std bd 32 LQFP 12 to 17 /W
Tsol Wave Solder < 2 to 3sec@248°C   265



Description

The MC100EP016 is a highspeed synchronous, presettable, cascadeable 8bit binary counter. Architecture and operation are the same as the MC10E016 in the ECLinPS family.

The MC100EP016 features internal feedback to TC  gated by the TCLD (Terminal Count Load) pin. When TCLD is LOW (or left open, in which case it is pulled LOW by the internal pulldowns), the TC feedback is disabled, and counting proceeds continuously, with TC going  LOW to indicate an allone state. When TCLD is HIGH, the TC feedback causes the counter to automatically reload upon TC = LOW, thus functioning as a programmable counter. The Qn outputs do not need to be terminated for the count function to operate properly. To minimize noise and power, unused Q outputs should be left unterminated. 

 




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