MB9F591A

Features:

• Clock
   Embedded PLL clock multiplication circuit
   Operating clock (PLL clock) can be selected from divided-by-2 of oscillation or one to four times the oscillation
   (at oscillation of 4 MHz, 4 MHz to 16 MHz).
   Minimum instruction execution time: 62.5 ns (operation at oscillation of 4 MHz, four times the oscillation clock,
   VCC of 5.0 V)
• Instruction set to optimize controller applications
   Rich data types (bit, byte, word, long word)
   Rich addressing mode (23 types)
   Enhanced signed multiplication/division instruction and RETI instruction functions
   Enhanced precision calculation realized by the 32-bit accumulator
• Instruction set designed for high level language (C language) and multi-task operations
   Adoption of system stack pointer
   Enhanced pointer indirect instructions
   Barrel shift instructions
• Program patch function (for two address pointers)
• Enhanced execution speed: 4-byte instruction queue
• Enhanced interrupt function: 8 levels, 34 factors
• Automatic data transmission function independent of CPU operation
   Extended intelligent I/O service function (EI2OS): Up to 10 channels
• Embedded ROM size and types
   Mask ROM: 256 Kbytes/384 Kbytes
   Flash ROM: 256 Kbytes/384 Kbytes
   Embedded RAM size: 6 Kbytes/8 Kbytes
• Flash ROM
   Supports automatic programming, Embedded Algorithm TM*
   Write/Erase/Erase-Suspend/Resume commands
   A flag indicating completion of the algorithm
   Hard-wired reset vector available in order to point to a fixed boot sector in Flash Memory
   Erase can be performed on each block
   Block protection with external programming voltage
• Low-power consumption (stand-by) mode
   Sleep mode (mode in which CPU operating clock is stopped)
   Stop mode (mode in which oscillation is stopped)
   CPU intermittent operation mode
   Clock mode
   Hardware stand-by mode
• Process
   0.5mm CMOS technology
• I/O port
   General-purpose I/O ports: 78 ports
• Timer
   Watchdog timer: 1 channel
   8/16-bit PPG timer: 8/16-bit ´ 6 channels
   16-bit re-load timer: 2 channels
• 16-bit I/O timer
   16-bit free-run timer: 1 channel
   Input capture: 6 channels
   Output compare: 6 channels
• Extended I/O serial interface: 1 channel
• UART (3 channels)
   With full-duplex double buffer (8-bit length)
   Clock asynchronized or clock synchronized (with start/stop bit) transmission can be selectively used.
• Stepping motor controller (4 channels)
• External interrupt circuit (8 channels)
   A module for starting an extended intelligent I/O service (EI2OS) and generating an external interrupt which
   is triggered by an external input.
• Delayed interrupt generation module
   Generates an interrupt request for switching tasks.
• 8/10-bit A/D converter (8 channels)
   8/10-bit resolution can be selectively used.
   Starting by an external trigger input.
• FULL-CAN interfaces: 2
   Conforming to Version 2.0 Part A and Part B
   Flexible message buffering (mailbox and FIFO buffering can be mixed)
• Sound generator
• 18-bit Time-base counter
• Clock timer: 1 channel
• External bus interface: Maximum address space 16 Mbytes
*: Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.


Pinout




Specifications

Parameter	Symbol	Rating		Unit	Remarks
		Min.	Max.
Power supply voltage	VCC	VSS - 0.3	VSS + 6.0	V
	AVCC	VSS - 0.3	VSS + 6.0	V	VCC = AVCC	*1
	AVRH, AVRL	VSS - 0.3	VSS + 6.0	V	AVCCAVRH/L, AVRHAVRL	*1
	DVCC	VSS - 0.3	VSS + 6.0	V	VCC DVCC
Input voltage	VI	VSS - 0.3	VSS + 6.0	V		*2
Output voltage	VO	VSS - 0.3	VSS + 6.0	V		*2
Clamp Current	ICLAMP	-2.0	2.0	mA
"L"level max.output current	IOL1	-	15	mA	Normal output	*3
"L"level avg.output current	IOLAV1	-	4	mA	Normal output, average value	*4
"L"level max.output current	IOL2	-	40	mA	High current output	*3
"L"level avg.output current	IOLAV2	-	30	mA	High current output,average value	*4
"L"level max.overall output current	IOL1	-	100	mA	Total normal output
"L"level max.overall output current	IOL2		330	mA	Total high current output
"L"level avg.overall output current	IOLAV1	-	50	mA	Total normal output, average value	*5
"L"level avg.overall output current	IOLAV2		250	mA	Total high current output,average value	*5
"H"level max.output current	IOH1	-	15	mA	Normal output	*3
"H"level avg.output current	IOHAV1	-	4	mA	Normal output, average value	*4
"H"level max.output current	IOH2	-	40	mA	High current output	*3
"H"level avg.output current	IOHAV2	-	30	mA	High current output, average value	*4
"H"level max.overall output current	IOH1	-	-100	mA	Total normal output
"H"level max.overall output current	IOH2	-	-330	mA	Total high current output
"H"level avg.overall output current	IOHAV1	-	-50	mA	Total normal output, average value	*5
"H"level avg.overall output current	IOHAV2	-	-250	mA	Total high current output, average value	*5
Power consumption	PD	-	500	mW	MB90F594A, MB90F591A, MB90F594G
		-	400	mW	MB90594, MB90591, MB90594G
Operating temperature	TA	40	+85	°C
Storage temperature	TSTG	55	+150	°C

Description

The MB9F591A series with two FULL-CAN*1 interfaces and FLASH ROM is especially designed for automotive and industrial applications. Its main features are two on board CAN Interfaces, which conform to V2.0 Part A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal full CAN approach.The instruction set of F2MC-16LX CPU core inherits an AT architecture of the F2MC*2 family with additional instruction sets for high-level languages, extended addressing mode, enhanced multiplication/division instructions, and enhanced bit manipulation instructions. The MB9F591A has a 32-bit accumulator for processing long word data.The MB90590/590G series has peripheral resources of 8/10-bit A/D converters, UART (SCI), extended I/O serial interface, 8/16-bit PPG timer, I/O timer (input capture (ICU), output compare (OCU)), stepping motor controller, and sound generator.
*1: Controller Area Network (CAN) - License of Robert Bosch GmbH
*2: F2MC stands for FUJITSU Flexible Microcontroller.