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MB91360G

Features: • Execution time : down to 15.6 ns (64 MHz)• FR50 series CPU : RISC architectureThe CPU has a general-purpose register architecture with improved numeric implementation whereby a wide range of delayed branch instructions reduces losses in execution time due to pipeline breaks...

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MB91360G: Features: • Execution time : down to 15.6 ns (64 MHz)• FR50 series CPU : RISC architectureThe CPU has a general-purpose register architecture with improved numeric implementation whereby...

MB91360G Data Sheet

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Part Number:
MB91360G
Supply Ability:
5000

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  • 1~5000
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  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Execution time : down to 15.6 ns (64 MHz)
• FR50 series CPU : RISC architecture
The CPU has a general-purpose register architecture with improved numeric implementation whereby a wide range of delayed branch instructions reduces losses in execution time due to pipeline breaks. Bit manipulation instructions and memory access instructions have been enhanced resulting in improved code efficiency and execution speed for control implementation.
· A five-stage pipeline structure provides high-speed processing (one instruction per cycle)
· 32-bit linear address space : 4 Gbytes
· Fixed 16-bit instruction size (basic instructions)
· High-speed multiplication/step division
· High-speed interrupt processing (6 cycles)
· General-purpose registers : 16 ´ 32 bits




Pinout

Connection Diagram


Specifications

Parameter Symbol Rating Unit Condition
Min Max
Digital supply voltage VDD-VSS -0.3 +6.0 V  
Stepper motor control supply voltage HVDD-HVSS -0.3 +6.5 V  
Storage temperature Tstg -55 +125  
Power consumption PTOT - 2500 mW TA = +25°C
Digital input voltage VIDIG -0.3*1 +5.8 V VSS = 0 V, VDD = 5 V
Analog input voltage VIA -0.3 +5.8 V VSSA = 0 V, VDDA = 5 V
Analog supply voltage VDDA-VSSA -0.3 +5.8 V VSSA = 0 V
Analog reference voltage VREFH/L-VSSA -0.3 +5.8 V VSSA = 0 V
Static DC current into digital I/O II/ODC -2.0 +2.0 mA *2
Static total DC current into digital I/O |II/ODC| - 20 mA *2
*1 : Making full use of the allowed static DC correct into digital I/O will lead to lower values for VIDIG Min.
*2 : ` Applicable to pins : D0 to D31, A0 to A20, CS0X to CS6X, RDY, BGRNTX, BRQ, RDX, WR0X to WR3X, AS,
ALE, CLK, DREQ0, DACK0, DEOP0, INT0 to INT7, SGO, SGA, SDA, SCL, SOT0, SIN0,
SCK0, OCPA0 to OCPA3, TX0, TX1, RX0, RX1, SOT3 to SOT4, SIN3 to SIN4,
SCK3 to SCK4, LED0 to LED7 (MB91F362GA only) , IN0 to IN3 (MB91F362GA only) ,
OUT0 to OUT3 (MB91F362GA only) , OCPA4 to OCPA7 (MB91F362GA only) ,
SOT1 to SOT2 (MB91F362GA only) , SIH1 to SIH2 (MB91F362GA only) ,
SCK1 to SCK2 (MB91F362GA only) , PWM1P0 to PWM1P3 (MB91F362GA only) ,
PWM1M0 to PWM1M3 (MB91F362GA only) , PWM2P0 to PWM2P3 (MB91F362GA only) ,
PWM2M0 to PWM2M3 (MB91F362GA only)


Description

The Fujitsu MB91360G series is a standard microcontroller containing a wide range of I/O peripherals and bus control functions. The MB91360G series features a 32-bit RISC CPU (FR50 series) core and is suitable for embedded control applications requiring high-performance and high-speed CPU processing. The MB91360G series also contains up to 4 Kbytes instruction cache memory and other internal memories to improve the execution speed of the CPU.




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