MB90880

• Clock Minimum instruction execution time : 30.3 ns / 4.125 MHz source oscillation * eight times (in internal operation : 33 MHz/3.3 V ± 0.3 V) PLL clock multiplication system
• Maximum memory space 16 Mbytes
• Instruction set optimized for control applications
   Supported data types : bit, byte, word and long word
   Standard addressing modes : 23 types
   Enhanced high-precision calculation realized by 32-bit accumulator
   Signed multiplication/division instructions and extended RETI instruction functions
• Instruction set supporting high-level language (C language) and multi-task operations
   Introduction of system stack pointer
   Symmetrical instruction set and barrel shift instructions
• Improved execution speed 4-byte queue
• Powerful interrupt functions Eight priority levels programmable; External interrupts : 24
• Data transfer functions (DMAC) Up to 16 channels
• Built-in ROM Flash ROM : 256, 384 and 512 Kbytes; MASK ROM : 256, 384 and 512 Kbytes
• Built-in RAM Flash RAM : 16, 24 and 30 Kbytes; MASK RAM : 16, 24 and 30 Kbytes
• General-purpose ports Dual clock product : up to 81 channels; Single clock product : up to 83 channels
• A/D converter RC successive approximation conversion type : 20 channels (Resolution : 8 or 10 bits)
• Multi-function serial interface 7 channels (software switchable between for SIO, UART and I²C)
• 16-bit PPG 8 channels
• 8/16-bit up-down counter/timer
   Event input pins : 6
   8-bit up-down counters : 2
   8-bit reload/compare registers : 2
• Base timer 4 channels (software switchable between 16-bit reload timer, PWC timer, PPG timer, and PWM timer)
• 16-bit I/O timer Input capture * 2 channels, output compare * 6 channels, free run timer * 1 channel
• Built-in dual clock generator
• Low power consumption modes Stop mode, sleep mode, CPU intermittent operation mode, watch timer, time base timer mode
• Package QFP-100/LQFP-100
• Process CMOS technology
• Power supply voltage 3V : Single power supply operation

*1 : The parameter is based on VSS = AVSS = DVSS = 0.0 V.
*2 : Set AVCC, DVCC and AVRH to the same voltage. AVCC and DVCC must not exceed VCC. Also, AVRH must not exceed AVCC.
*3 : VI and VO must not exceed 0.3V. When the maximum current to/from an input is limited by using an external component, the ICLAMP rating supersedes the VI rating.
*4 : The maximum output current is defined as the peak value of the current of any one of the corresponding pins
*5 : The average output current is defined as the value of the average current flowing over 100 ms at any one of the corresponding pins.
*6 : The average total output current is defined as the value of the average current flowing over 100 ms at all of the corresponding pins.
*7 : • Relevant pins : P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47, P50 to P57, P60 to P67,P70 to P76, P80 to P87, P90 to P97, PA0 to PA3
• Use within recommended operating conditions.
• Use with DC voltage (current) .
• The + B signal should always be applied with a limiting resistance placed between the + B signal and the microcontroller.
• Set the limiting resistor value, whether instantaneous or stationary, so that the current to be input to the microcontroller pin does not exceed the rating during the input of the + B signal.
• Note that when the microcontroller drive current is low, such as in the power saving modes, the + B input potential may pass through the protective diode and increase the potential at the VCC pin, and this may affect other devices.
• Note that if a + B signal is input when the microcontroller current is off (not fixed at 0 V) , the power supply is provided from the pins, so that incomplete operation may result.
• Note that if the + B input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the power-on reset.
• Care must be taken not to leave the + B input pin open.
• Note that analog system input/output pins (LCD drive pins, comparator input pins, etc.) cannot accept + B signal input.

The MB90880 series is a general-purpose 16-bit microcontroller, designed by Fujitsu, for process control of devices such as consumer appliances, which require high-speed real-time processing capabilities.

The instruction set of the F²MC-16LX CPU core retains the same AT architecture as the F²MC*1 family, with further refinements including high-level language instructions, an expanded addressing mode, enhanced multiplierdivider instructions and bit processing. In addition, a 32-bit accumulator is built in to enable long word processing.

As its peripheral resources, the MB90880 series has a 16-bit PPG, multi-function serial interface (software switch over enabled for SIO, UART and I²C*2) , 10-bit A/D converter, 16-bit I/O timer, 8/16-bit up-down counter, base timer (software switch over enabled for 16-bit reload timer, PWC timer, PPG timer and PWM timer) ,DTP / external interrupt and chip select pins.