MB84VD2109X-85 Selling Leads, Price trend, MB84VD2109X-85 DataSheet download, circuit diagram from SeekIC.com

Features: • Power supply voltage of 2.7 to 3.6 V• High performance 85 ns maximum access time• Operating Temperature -25 to +85 °C• Package 61-ball FBGA, 56-pin TSOP(I) 1. FLASH MEMORY• Simultaneous Read/Write operations (dual bank) Miltiple devices available with diff...

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SeekIC No. : 004413505 Detail

MB84VD2109X-85: Features: • Power supply voltage of 2.7 to 3.6 V• High performance 85 ns maximum access time• Operating Temperature -25 to +85 °C• Package 61-ball FBGA, 56-pin TSOP(I) 1. FLA...

MB84VD2109X-85 Data Sheet

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Part Number:: MB84VD2109X-85
Supply Ability:: 5000

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Product Details

Description

Features:

• Power supply voltage of 2.7 to 3.6 V
• High performance
   85 ns maximum access time
• Operating Temperature
   -25 to +85 °C
• Package 61-ball FBGA, 56-pin TSOP(I)
   1. FLASH MEMORY
• Simultaneous Read/Write operations (dual bank)
    Miltiple devices available with different bank sizes
    Host system can program or erase in one bank, then immediately and simultaneously read from the other bank
    Zero latency between read and write operations
    Read-while-erase
    Read-while-program
• Minimum 100,000 write/erase cycles
• Sector erase architecture
   Eight 4 K words and thirty one 32 K words.
   Any combination of sectors can be concurrently erased. Also supports full chip erase.
• Boot Code Sector Architecture
   MB84VD2108X : Top sector
   MB84VD2109X : Bottom sector
• Embedded Erase^TM* Algorithms
    Automatically pre-programs and erases the chip or any sector
• Embedded Program^TM*Algorithms
    Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready-Busy output (RY/BY)
   Hardware method for detection of program or erase cycle completion
• Automatic sleep mode
   When addresses remain stable, automatically switch themselves to low power mode.
• Low V_CCf write inhibit 2.5 V
• Hidden ROM (Hi-ROM) region
   64K byte of Hi-ROM, accessible through a new "Hi-ROM Enable" command sequence
   Factory serialized and protected to provide a secure electronic serial number (ESN)
• WP/ACC input pin
    At V_IL, allows protection of boot sectors, regardless of sector protection/unprotection status
    (MB84VD2108X : SA37, SA38 MB84VD2109X : SA0, SA1)
    At V_IH, allows removal of boot sector protection
    At V_ACC, program time will reduse by 40%.
• Erase Suspend/Resume
   Suspends the erase operation to allow a read in another sector within the same device
• Please refer to "MBM29DL16XTD/BD" data sheet in detailed function
   2. SRAM
• Power dissipation
   Operating: 50 mA max.
   Standby: 7 A max.
• Power down features using CE1s and CE2s
• Data retention supply voltage : 1.5 V to 3.6 V
• CE1s and CE2s Chip Select
• Byte data control : LBs (DQ0 to DQ7) , UBs (DQ8 to DQ15)
* : Embedded Erase^TM and Embedded Program^TM are trademarks of Advanced Micro Devices, Inc.

Pinout

Connection Diagram

Specifications

Parameter	Symbol	Rating		Unit
Parameter	Symbol	Min.	Max.	Unit
Storage Temperature	Tstg	-55	+125	°C
Ambient Temperature with Power Applied	T_A	-25	+85	°C
Voltage with Respect to Ground All pins except A9, OE, RESET , WP/ACC (Note 1)	VI_N, V_OUT	-0.3	V_CCf +0.4	V
	VI_N, V_OUT	-0.3	V_CCs +0.4	V
V_CCf/V_CCs Supply (Note 1)	V_CCf, V_CCs	-0.3	+4.0	V
A₉ and OE (Note 2)	V_IN	-0.3	+13.0	V
RESET (Note 2)	V_IN	-0.5	+13.0	V
WP/ACC (Note 3)	V_IN	-0.5	+10.5	V

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
                 temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Notes 1. Minimum DC voltage on input or I/O pins is 0.3 V. During voltage transitions, input or I/O pins may
              undershoot V_SS to 2.0 V for periods of up to 20 ns. Maximum DC voltage on input or I/O pins is V_CCf
              +0.4 V or V_CCs+0.4 V. During voltage transitions, input or I/O pins may overshoot to V_CCf+2.0 V or V_CCs+2.0
              V for periods of up to 20 ns.
          2. Minimum DC input voltage on A9 and OE pin is 0.3 V. Minimum DC input voltage on RESET pin is
             0.5 V. During voltage transitions, A9, OE, and RESET pins may undershoot VSS to 2.0 V for periods of
              up to 20 ns.
              Voltage difference between input and supply voltage (VIN-V_CCf or V_CCs) does not exceed 9.0 V.
             Maximum DC input voltage on A_9, OE, and RESET pins is +13.0 V which may overshoot to 14.0 V for
             periods of up to 20 ns.
         3. Minimum DC input voltage on WP/ACC pin is 0.5 V. During voltage transitions, WP/ACC pin may
             undershoot Vss to 2.0 V for periods of up to 20 ns. Maximum DC input voltage on WP/ACC pin is +10.5
             V which may overshoot to 12.0 V for periods of up to 20 ns, when VCCf is applied.

MB84VD2109X-85

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