Features: • Double Data Rate• Bi-directional Data Strobe Signal• Eight bank operation• Burst read/write operation• Programmable, burst length, and CAS latency• Write latency (Write command to data input) = CAS latency -1• Byte write control by DM0 to DM3...
MB81N643289-50: Features: • Double Data Rate• Bi-directional Data Strobe Signal• Eight bank operation• Burst read/write operation• Programmable, burst length, and CAS latency• Wr...
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Parameter | Symbol | Value | Unit |
Voltage of VCC Supply Relative to VSS | VDD, VDDQ | 0.5 to +3.6 | V |
Voltage at Any Pin Relative to VSS | VIN, VOUT | 0.5 to +3.6 | V |
Short Circuit Output Current | IOUT | ±50 | mA |
Power Dissipation | PD | 2.0 | W |
Storage Temperature | TSTG | 55 to +125 | °C |
The Fujitsu MB81N643289-50 is a CMOS Fast Cycle Random Access Memory (FCRAM) containing 67,108,864 memory cells accessible in an 32-bit format. The MB81N643289-50 features a fully synchronous operation referenced to clock edge whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. The MB81N643289 is designed to reduce the complexity of using a standard dynamic RAM (DRAM) which requires many control signal timing constraints. The MB81N643289-50 uses Double Data Rate (DDR) where data bandwidth is twice of fast speed compared with regular SDRAMs.
The MB81N643289-50 is designed using Fujitsu advanced FCRAM Core Technology.
The MB81N643289-50 is ideally suited for Digital Visual System, High Performance Graphic Adapters, Hardware Accelerators, Buffers, and other applications where large memory density and high effective bandwidth are required and where a simple interface is needed.
The MB81N643289-50 adopts new I/O interface circuitry, 2.5 V CMOS Source Termination I/O interface, which is capable of extremely fast data transfer of quality under point to point bus environment.