MAX9724C

The MAX9724 suppresses RF radiation received by input and supply traces acting as antennas and prevents the amplifier from demodulating the coupled noise. The MAX9724C/MAX9724D stereo headphone amplifiers are designed for portable equipment where board space is at a premium. The MAX9724C/MAX9724D operate from a single 2.5V to 5.5V supply, consume only 3.5mA of supply current, feature short-circuit and thermal-overload protection, and are specified over the extended -40°C to +85°C temperature range. The MAX9724C/MAX9724D deliver up to 60mW per channel into a 32 load and have low 0.02% THD+N. These devices use a unique, DirectDrive architecture to produce a ground-referenced output from a single supply, eliminating the need for large DC-blocking capacitors, saving cost, board space, and component height. The MAX9724C offers an externally adjustable gain while the MAX9724D has an internally preset gain of -1.5V/V. An 80dB at 1kHz power-supply rejection ratio (PSRR)allows these devices to operate from noisy digital supplies without an additional linear regulator. Comprehensive click-and-pop circuitry suppresses audible clicks and pops on startup and shutdown. The devices are available in tiny 12-bump UCSP(1.5mm x 2mm)and 12-pin thin QFN (3mm x 3mm x 0.8mm)packages.

The features of MAX9724C can be summarized as (1)improved rf noise rejection (Up to 67dB over typical amplifiers); (2)no bulky dc-blocking capacitors required; (3)low-power shutdown mode, < 0.1A; (4)adjustable gain (MAX9724C)or fixed -1.5V/V gain (MAX9724D); (5)low 0.02% THD+N; (6)high PSRR (80dB at 1kHz)Eliminates LDO; (7)integrated click-and-pop suppression; (8)2.5v to 5.5v single-supply operation; (9)low quiescent current (3.5mA); (10)available in space-saving packages 12-bump UCSP (1.5mm x 2mm)/ 12-pin thin QFN (3mm x 3mm x 0.8mm).

The absolute maximum ratings of MAX9724C are (1)VDD to GND: -0.3V to +6V; (2)PVSS to SVSS: -0.3V to +0.3V; (3)PGND to SGND: -0.3V to +0.3V; (4)C1P to PGND: -0.3V to (VDD + 0.3V); (5)C1N to PGND: (PVSS - 0.3V)to +0.3V; (6)PVSS and SVSS to PGND: -6V to +0.3V; (7)IN_ to SGND (MAX9724C): -0.3V to (VDD + 0.3V); (8)IN_ to SGND (MAX9724D): (SVSS - 0.3V)to (VDD + 0.3V); (9)OUT_ to SVSS: -0.3V to Min (VDD - SVSS + 0.3V, +9V); (10)OUT_ to VDD: +0.3V to Max (SVSS - VDD - 0.3V, -9V); (11)SHDN to _GND: -0.3V to +6V; (12)OUT_ short circuit to gnd: continuous; (13)short circuit between OUTL and OUTR: continuous; (14)continuous input current into PVSS: 260mA; (15)Continuous Input Current (any other pin): ±20mA; (16)continuous power dissipation (TA = +70°C, multilayer board)12-bump UCSP (derate 6.5mW/°C above +70°C): 519mW / JA: 154 C/W / 12-pin TQFN (derate 16.7mW/°C above +70°C): 1333mW / JA: 60°C/W JC: 11°C/W; (17)operating temperature range: -40°C to +85°C; (18)storage temperature range: -65°C to +150°C; (19)junction temperature: +150°C; (20)lead temperature (soldering, 10s): +300°C; (21)bump temperature (soldering)reflow: +235°C.