MAX9175

V_CC to GND.........................-0.3V to +4.0V
IN+, IN- to GND.............................................-0.3V to +4.0V
OUT_+, OUT_- to GND.......................................-0.3V to +4.0V
PD0, PD1 to GND......................................-1.4V to (V_CC + 1.4V)
Single-Ended and Differential Output
Short-Circuit Duration (OUT_+, OUT_-) ..................Continuous
Continuous Power Dissipation (T_A = +70)
10-Pin MAX (derate 5.6mW/above +70) ..............444mW
10-Lead QFN (derate 24.4mW/ above +70) ........1951mW
Maximum Junction Temperature ...................................+150
Storage Temperature Range ..........................-65 to +150
ESD Protection
Human Body Model (RD = 1.5k, CS = 100pF)
IN+, IN-, OUT_+, OUT_-................................................±2kV
Other Pins (V_CC, PD0, PD1) ...............................................2kV
IEC 61000-4-2 Level 4 (R_D = 330, C_S = 150pF)
Contact Discharge IN+, IN-, OUT_+, OUT_- ...................±8kV
Air-Gap Discharge IN+, IN-, OUT_+, OUT_- ..................±15kV
Lead Temperature (soldering, 10s) .............................+300
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

The MAX9174/MAX9175 are 670MHz, low-jitter, lowskew 1:2 splitters ideal for protection switching, loopback, and clock and signal distribution. The MAX9175 feature ultra-low 1.0ps(RMS) random jitter (max) that ensures reliable operation in high-speed links that are highly sensitive to timing errors.

The MAX9174 has a fail-safe LVDS input and LVDS outputs.

The MAX9175 has an anything differential input (CML/LVDS/LVPECL) and LVDS outputs. The outputs can be put into high impedance using the power-down inputs. The MAX9174 features a fail-safe circuit that drives the outputs high when the input is open, undriven and shorted, or undriven and terminated. The MAX9175 has a bias circuit that forces the outputs high when the input is open. The power-down inputs are compatible with standard LVTTL/LVCMOS logic. The power-down inputs tolerate undershoot of -1V and overshoot of V_CC + 1V. The MAX9174/MAX9175 are available in 10-pin MAX and 10-lead thin QFN with exposed pad packages, and operate from a single +3.3V supply over the -40 to +85 temperature range.