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MAX7000

Features: High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available MAX 7000S devices ISP circuitry compatible wi...

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SeekIC No. : 004412008 Detail

MAX7000: Features: High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149...

MAX7000 Data Sheet

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Part Number:
MAX7000
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/22

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Product Details

Description



Features:

High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture
5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available MAX 7000S devices
ISP circuitry compatible with IEEE Std. 1532
Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices
Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S devices with 128 or more macrocells
Complete EPLD family with logic densities ranging from 600 to 5,000 usable gates (see Tables 1 and 2)
5-ns pin-to-pin logic delays with up to 175.4-MHz counter frequencies (including interconnect)
PCI-compliant devices available


Specifications

Symbol Parameter Conditions
Min
Max
Unit
VCC

VI
IOUT
TSTG
TAMB
TJ		 Supply voltage

DC input voltage
DC output current, per pin
Storage temperature
Ambient temperature
Junction temperature
 With respect to ground (2)


No bias
Under bias
Ceramic packages, under bias
PQFP and RQFP packages, under bias
2.0


2.0
25
65
65
7.0

7.0
25
150
135
150
135
V

V
mA
° C
° C
° C
° C



Description

The MAX7000 high-density, high-performance PLDs is based on Altera's second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz. MAX 7000S devices in the -5, -6, -7, and -10 speed grades as well as MAX7000 and MAX 7000E devices in -5, -6, -7, -10P, and -12P speed grades comply with the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2. See Table 3 for available speed grades.




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