Features: · Single +3.3V Supply
· 910mW Operating Power
· Fully Integrated Clock Recovery and Data Retiming
· Exceeds ANSI, ITU, and Bellcore Specifications
· Additional High-Speed Input Facilitates System Loopback Diagnostic Testing
· 2.488Gbps Serial to 155Mbps Parallel Conversion
· LVDS Data Outputs and Synchronization Inputs
· Tolerates >2000 Consecutive Identical Digits
· Loss-of-Lock IndicatorApplication · 2.488Gbps SDH/SONET Transmission Systems
· Add/Drop Multiplexers
· Digital Cross-ConnectsPinout
SpecificationsPositive Supply Voltage (VCC)...............................-0.5V to +7.0V
Input Voltage Level (SDI+, SDI-, SLBI+, SLBI-,
SYNC+, SYNC-)................................. (VCC - 0.5V) to (VCC + 0.5V)
Input Current Level (SDI+, SDI-, SLBI+, SLBI-)................±10mA
Voltage at LOL, SIS, PHADJ+, PHADJ-,
FIL+, FIL- ...................................................-0.5V to (VCC + 0.5V)
Output Current LVDS Outputs ............................................10mA
Continuous Power Dissipation (TA = +85°C)
TQFP (derate 33.3mW/°C above +85°C)...........................1.44W
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range ............................-55°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DescriptionThe MAX3880 deserializer with clock recovery is ideal for converting 2.488Gbps serial data to 16-bit-wide, 155Mbps parallel data for SDH/SONET applications. Operating from a single +3.3V supply, this device accepts high-speed serial-data inputs and delivers lowvoltage differential-signal (LVDS) parallel clock and data outputs for interfacing with digital circuitry.
The MAX3880 includes a low-power clock recovery and data retiming function for 2.488Gbps applications. The fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input; the signal is then retimed by the recovered clock. The MAX3880's jitter performance exceeds all SDH/SONET specifications. An additional 2.488Gbps serial input is available for system loopback diagnostic testing. The device also includes a TTL-compatible loss-of-lock (LOL) monitor and LVDS synchronization inputs that enable data realignment and reframing.
The MAX3880 is available in the extended temperature range (-40°C to +85°C) in a 64-pin TQFP-EP (exposed pad) package.
MAX3880 Data Sheet
