Features: · Fully Integrated Clock Recovery and Data Retiming· Power Dissipation: 260mW with +3.3V Supply· Clock Jitter Generation: 5mUIRMS· Exceeds ANSI, ITU, and Bellcore SDH/SONET Jitter Specifications· Differential Input Range: 50mVP-P to 1.6VP-P· Single +3.3V Power Supply· PLL Fast Track (FAS...
MAX3873: Features: · Fully Integrated Clock Recovery and Data Retiming· Power Dissipation: 260mW with +3.3V Supply· Clock Jitter Generation: 5mUIRMS· Exceeds ANSI, ITU, and Bellcore SDH/SONET Jitter Specific...
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Supply Voltage, VCC.............................................-0.5V to +5.0V
Voltage at SDI± ........................... (VCC - 1.0V) to (VCC + 0.5V)
CML Output Current at SDO±, SCLKO± ..........................22mA
Voltage at LOL, FASTRACK, FIL±, SCLKEN
MODE, RATESET........................................-0.5V to (VCC + 0.5V)
Continuous Power Dissipation (TA = +85°C)
20-Pin QFN (derate 20.0mW/°C above +85°C) ........1300mW
Operating Temperature Range .....................-40°C to +85°C
Storage Temperature Range ......................-50°C to +150°C
Processing Temperature.............................................+400°C
Lead Temperature (soldering, 10s) ...........................+300°C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure absolute maximum rating conditions for extended periods may affect device reliability.
The MAX3873 is a compact, low-power 2.488Gbps/2.67Gbps clock-recovery and data-retiming IC for SDH/SONET applications. The phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input. The input data is then retimed by this recovered clock, providing a clean data output. The MAX3873 meets all SDH/SONET jitter specifications, does not require an external reference clock to aid in frequency acquisition, and provides excellent tolerance to both deterministic and sinusoidal jitter. The MAX3873 provides a PLL loss-of-lock (LOL) output to indicate whether the CDR is in lock. The recovered data and clock outputs are CML with on-chip 50Ω back terminations on each line. The clock output of MAX3873 can be powered down if not used.
The MAX3873 is implemented in Maxim's second-generation SiGe process and consumes only 260mW at 3.3V supply (output clock disabled, low output swing). The MAX3873 is available in a 4mm x 4mm 20-pin QFN exposed-pad package and operates from -40°C to +85°C.