MAX3281E

Features:

`ESD Protection:
          ±15kVHuman Body Model
          ±6kVIEC 1000-4-2, Contact Discharge
          ±12kVIEC 1000-4-2, Air-Gap Discharge
`Guaranteed 52Mbps Data Rate
`Guaranteed 15ns Receiver Propagation Delay
`Guaranteed 2ns Receiver Skew
`Guaranteed 8ns Package-to-Package Skew Time
`VL Pin for Connection to FPGAs/ASICs
`Allow Up to 128 Transceivers on the Bus (1/4-unit-load)
`Tiny SOT23 Package
`True Fail-Safe Receiver
`-7V to +12V Common-Mode Range
`3V to 5.5V Power-Supply Range
`Enable (High and Low) Pins for Redundant Operation
`Three-State Output Stage (MAX3281E/MAX3283E)
`Thermal Protection Against Output Short Circuit


Application

·Clock Distribution
·Telecom Racks
·Base Stations
·Industrial Control
·Local Area Networks


Pinout

Specifications

Supply Voltage (V_CC) ..............................................-0.3V to +6V
Control Input Voltage (EN, EN).................................-0.3V to +6V
VL Input Voltage ......................................................-0.3V to +6V
Receiver Input Voltage (A, B)..............................-7.5V to +12.5V
Receiver Output Voltage (RO).....................-0.3V to (V_CC + 0.3V)
Receiver Output Voltage
(RO) (MAX3284E) ..........................................-0.3V to (V_L + 0.3V)
Receiver Output Short-Circuit Current .......................Continuous
Continuous Power Dissipation (TA = +70)
5-Pin SOT23 (derate 7.1mW/ above +70)..................571mW
6-Pin SOT23 (derate 8.7mW/ above +70)..................696mW
Operating Temperature Range
MAX328_EA__ ....................................................-40 to +125
Storage Temperature Range ..............................-65 to +150
Junction Temperature.......................................................+150
Lead Temperature (soldering, 10s) .................................+300


Description

The MAX3280E/MAX3281E/MAX3283E/MAX3284E are single receivers designed for RS-485 and RS-422 communication. These devices guarantee data rates up to 52Mbps, even with a 3V power supply. Excellent propagation delay (15ns max) and package-to-package skew time (8ns max) make these devices ideal for multidrop clock distribution applications.

The MAX3280E/MAX3281E/MAX3283E/MAX3284E have true fail-safe circuitry, which guarantees a logichigh receiver output when the receiver inputs are opened or shorted. The receiver output will be a logic high if all transmitters on a terminated bus are disabled (high impedance). These devices feature 1/4-unit-load receiver input impedance, allowing up to 128 receivers on the same bus.

The MAX3280E is a single receiver available in a 5-pin SOT23 package. The MAX3281E/MAX3283E single receivers have a receiver enable (EN or EN) function and are offered in a 6-pin SOT23 package. The MAX3284E features a voltage logic pin that allows compatibility with low-voltage logic levels, as in digital FPGAs/ASICs. On the MAX3284E, the voltage threshold for a logic high is user-defined by setting VL in the range from 1.65V to VCC. The MAX3284E is also offered in a 6-pin SOT23 package.