MAX1470

  Operates from a Single +3.0V to +3.6V Supply
  Built-In 53dB RF Image Rejection
  -115dBm Receive Sensitivity*
  250µs Startup Time
  Low 5.5mA Operating Supply Current
  1.25µA Low-Current Power-Down Mode for Efficient Power Cycling
  250MHz to 500MHz Operating Band (Image Rejection Optimized at 315MHz)
 Integrated PLL with On-Board Voltage-Controlled Oscillator (VCO) and Loop Filter
  Selectable IF Bandwidth Through External Filter
  Complete Receive System from RF to Digital Data Out

AVDD to AGND ......................................................-0.3V to +4.0V              Operating Temperature Range
DVDD to DGND......................................................-0.3V to +4.0V                   MAX1470EUI ...................................................-40°C to +85°C
All Other Pins Referenced to AGND...........-0.3V to   (VDD + 0.3V)              Storage Temperature Range .............................-60°C to +150°C
Continuous Power Dissipation (TA = +70°C)                                              Lead Temperature (soldering, 10s) .................................+300°C
  28-Pin TSSOP (derate 13mW/°C above +70°C) .........1039mW

The MAX1470 is a fully integrated low-power CMOS superheterodyne receiver for use with amplitude-shiftkeyed (ASK) data in the 315MHz band. With few required external components, and a low-current power-down mode, it is ideal for cost- and power-sensitive applications in the automotive and consumer markets. The chip consists of a 315MHz low-noise amplifier (LNA), an image rejection mixer, a fully integrated 315MHz phase-lock-loop (PLL), a 10.7MHz IF limiting amplifier stage with received-signal-strength indicator (RSSI) and an ASK demodulator, and analog baseband data-recovery circuitry.

The MAX1470 is available in a 28-pin TSSOP package.