MAX12555

V_DD to GND...........................................................-0.3V to +3.6V
OV_DD to GND........-0.3V to the lower of (V_DD + 0.3V) and +3.6V
INP, INN to GND ..-0.3V to the lower of (V_DD + 0.3V) and +3.6V
REFIN, REFOUT, REFP, REFN, COM
to GND.................-0.3V to the lower of (V_DD + 0.3V) and +3.6V
CLKP, CLKN, CLKTYP, G/T, DCE,
PD to GND ...........-0.3V to the lower of (V_DD + 0.3V) and +3.6V
D13D0, DAV, DOR to GND....................-0.3V to (OV_DD + 0.3V)
Continuous Power Dissipation (T_A = +70°C)
40-Pin Thin QFN 6mm x 6mm x 0.8mm
(derated 26.3mW/°C above +70°C).......................2105.3mW
Operating Temperature Range .......................-40°C to +85°C
Junction Temperature....................................................+150°C
Storage Temperature Range .........................-65°C to +150°C
Lead Temperature (soldering 10s) ................................+300°C

Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

The MAX12555 is a 3.3V, 14-bit, 95Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts singleended or differential signals. The MAX12555 is optimized for high dynamic performance, low power, and small size. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz and beyond, making the MAX12555 ideal for intermediatefrequency (IF) sampling applications.

Powered from a single 3.3V supply, the MAX12555 consumes only 497mW while delivering a typical 72dB signal- to-noise ratio (SNR) performance at a 175MHz input frequency. In addition to low operating power, the MAX12555 features a 300W power-down mode to conserve power during idle periods.

A flexible reference structure allows the MAX12555 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.10V. The MAX12555 provides a common- mode reference to simplify design and reduce external component count in differential analog input circuits.

The MAX12555 supports either a single-ended or differential input clock. Wide variations in the clock duty cycle are compensated with the ADC's internal dutycycle equalizer (DCE).

ADC conversion results are available through a 14-bit, parallel, CMOS-compatible output bus. The digital output format is pin selectable to be either two's complement or Gray code. A data-valid indicator eliminates external components that are normally required for reliable digital interfacing. A separate digital power input accepts a wide 1.7V to 3.6V supply, allowing the MAX12555 to interface with various logic levels.

The MAX12555 is available in a 6mm x 6mm x 0.8mm, 40-pin thin QFN package with exposed paddle (EP), and is specified for the extended industrial (-40°C to +85°C) temperature range.

See the Pin-Compatible Versions table for a complete family of 14-bit and 12-bit high-speed ADCs.