Features: ` Two Matched 6-Bit, 800Msps ADCs` Excellent Dynamic Performance 36.4dB SINAD at fIN 200MHz and fCLK 800MHz` Typical INL and DNL: ±0.25LSB` Channel-to-Channel Phase Matching: ±0.2°`Channel-to-Channel Gain Matching: ±0.04dB` 6:12 Demultiplexer reduces the Data Rates to 400MHz` Low Error...
MAX105: Features: ` Two Matched 6-Bit, 800Msps ADCs` Excellent Dynamic Performance 36.4dB SINAD at fIN 200MHz and fCLK 800MHz` Typical INL and DNL: ±0.25LSB` Channel-to-Channel Phase Matching: ±0.2°`Chann...
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The MAX105 is a dual, 6-bit, analog-to-digital converter (ADC) designed to allow fast and precise digitizing of in-phase (I) and quadrature (Q) baseband signals. The device converts the analog signals of both I and Q components to digital outputs at 800Msps while achieving a signal-to-noise ratio (SNR) of typically 37dB with an input frequency of 200MHz, and an integral nonlinearity (INL) and differential nonlinearity (DNL) of ±0.25 LSB. The MAX105 analog input preamplifiers feature a 400MHz, -0.5dB, and a 1.5GHz, -3dB analog input bandwidth. Matching channel-to-channel performance is typically 0.04dB gain, 0.1LSB offset, and 0.2 degrees phase. Dynamic performance is 36.4dB signal-to-noise plus distortion (SINAD) with a 200MHz analog input signal and a sampling speed of 800MHz. A fully differential comparator design and encoding circuits reduce out-of-sequence errors, and ensure excellent metastable performance of only one error per 1016 clock cycles.
In addition, the MAX105 provides LVDS digital outputs with an internal 6:12 demultiplexer that reduces the output data rate to one-half the sample clock rate. Data is output in two's complement format. The MAX105 operates from a +5V analog supply and the LVDS output ports operate at +3.3V. The data converter's typical power dissipation is 2.6W. The device is packaged in an 80-pin, TQFP package with exposed paddle, and is specified for the extended (-40 to +85) temperature range. For a lower-speed, 400Msps version of the MAX105, please refer to the MAX107 data sheet.