MAX105

Features: ` Two Matched 6-Bit, 800Msps ADCs` Excellent Dynamic Performance 36.4dB SINAD at fIN 200MHz and fCLK 800MHz` Typical INL and DNL: ±0.25LSB` Channel-to-Channel Phase Matching: ±0.2°`Channel-to-Channel Gain Matching: ±0.04dB` 6:12 Demultiplexer reduces the Data Rates to 400MHz` Low Error...

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SeekIC No. : 004408420 Detail

MAX105: Features: ` Two Matched 6-Bit, 800Msps ADCs` Excellent Dynamic Performance 36.4dB SINAD at fIN 200MHz and fCLK 800MHz` Typical INL and DNL: ±0.25LSB` Channel-to-Channel Phase Matching: ±0.2°`Chann...

floor Price/Ceiling Price

Part Number:
MAX105
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

` Two Matched 6-Bit, 800Msps ADCs
` Excellent Dynamic Performance
    36.4dB SINAD at fIN 200MHz and
    fCLK 800MHz
` Typical INL and DNL: ±0.25LSB
` Channel-to-Channel Phase Matching: ±0.2°
`Channel-to-Channel Gain Matching: ±0.04dB
` 6:12 Demultiplexer reduces the Data Rates to
    400MHz
` Low Error Rate: 1016 Metastable States at
    800Msps
` LVDS Digital Outputs in Two's Complement
    Format



Application

VSAT Receivers
WLANs
Test Instrumentation
Communications Systems



Specifications

AVCC, AVCCI, AVCCQ and AVCCR to AGND..............-0.3V to +6V
OVCCI and OVCCQ to OGND...................................-0.3V to +4V
AGND to OGND ................................................... -0.3V to +0.3V
P0I± to P5I± and A0I± to A5I±
DREADY+, DREADY- to OGNDI....................-0.3V to OVCCI+0.3V
P0Q± to P5Q±, A0Q± to A5Q±
DOR+ and DOR- to OGNDQ ......................-0.3V to OVCCQ+0.3V
REF to AGNDR............................................-0.3V to AVCCR+0.3V
Differential Voltage Between INI+ and INI- ..................-2V, +2V
Differential Voltage Between INQ+ and INQ-................-2V, +2V
Differential Voltage Between CLK+ and CLK- ...............-2V, +2V
Maximum Current Into Any Pin ..........................................50mA
Continuous Power Dissipation (TA = +70)
80-Pin TQFP (derate 44mW/above +70).......................3.5W
Operating Temperature Range
MAX105ECS .........................................................-40 to +85
Junction Temperature......................................................+150
Storage Temperature Range .............................-60 to +150
Lead temperature (soldering, 10s) .................................+300



Description

The MAX105 is a dual, 6-bit, analog-to-digital converter (ADC) designed to allow fast and precise digitizing of in-phase (I) and quadrature (Q) baseband signals. The device converts the analog signals of both I and Q components to digital outputs at 800Msps while achieving a signal-to-noise ratio (SNR) of typically 37dB with an input frequency of 200MHz, and an integral nonlinearity (INL) and differential nonlinearity (DNL) of ±0.25 LSB. The MAX105 analog input preamplifiers feature a 400MHz, -0.5dB, and a 1.5GHz, -3dB analog input bandwidth. Matching channel-to-channel performance is typically 0.04dB gain, 0.1LSB offset, and 0.2 degrees phase. Dynamic performance is 36.4dB signal-to-noise plus distortion (SINAD) with a 200MHz analog input signal and a sampling speed of 800MHz. A fully differential comparator design and encoding circuits reduce out-of-sequence errors, and ensure excellent metastable performance of only one error per 1016 clock cycles.

In addition, the MAX105 provides LVDS digital outputs with an internal 6:12 demultiplexer that reduces the output data rate to one-half the sample clock rate. Data is output in two's complement format. The MAX105 operates from a +5V analog supply and the LVDS output ports operate at +3.3V. The data converter's typical power dissipation is 2.6W. The device is packaged in an 80-pin, TQFP package with exposed paddle, and is specified for the extended (-40 to +85) temperature range. For a lower-speed, 400Msps version of the MAX105, please refer to the MAX107 data sheet.




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