Features: ` JTAG-Compatible, 5-V in-system programming`44 Pins in PLCC and TQFP` 64 Macrocells` 7.5 ns tPD Commercial, 10 ns tPD Industrial` 133 MHz fCNT`32 I/Os; 2 dedicated inputs/clocks` 64 Flip-flops; 2 clock choices` 4 PALCE26V16 blocks with buried macrocells` Speed Locking™ for guara...
MACH211SP-7/10/12/15: Features: ` JTAG-Compatible, 5-V in-system programming`44 Pins in PLCC and TQFP` 64 Macrocells` 7.5 ns tPD Commercial, 10 ns tPD Industrial` 133 MHz fCNT`32 I/Os; 2 dedicated inputs/clocks` 64 Flip-...
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DescriptionThe MACH110-10JC is one member of the MACH110 family which is designed as the high-dens...
Features: `44 Pins`32 Macrocells`12 ns tPD Commercial 14 ns tPD Industrial`77 MHz fCNT`38 Inputs`3...
Storage Temperature . . . . . . . . . . . . . . . . . . .. . 65°C to +150°C
Ambient Temperature
with Power Applied . . . . . . . . . . . . . . . . . . . . . .. 55°C to +125°C
Device Junction Temperature . . . .. . . . . . . . . . . . . . . . . . . . +150°C
Supply Voltage with
Respect to Ground . . . . . . . . . . . . . . . . . .. . . . . . . 0.5 V to +7.0 V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . .0.5 V to VCC + 0.5 V
DC Output or
I/O Pin Voltage. . . . . . . . . . . . . . . . . . . . . . . .0.5 V to VCC + 0.5 V
Static Discharge Voltage . . . . . . . . . . . . . . . .. . . . . . . . . . . . 2001 V
Latchup Current (TA = 0°C to 70°C. . . . . . . . . . . . . . . . . 200 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to Absolute Maximum
Ratings for extended periods may affect device reliability.
The MACH211SP is a member of Vantis' high-performance EE CMOS MACH 1 & 2 families. This device has approximately six times the logic macrocell capability of the popular PALCE22V10 without loss of speed.
The MACH211SP consists of four PAL® blocks interconnected by a programmable switch matrix. The four PAL blocks are essentially "PALCE26V16" structures complete with product-term arrays and programmable macrocells, which can be programmed as high speed or low power, and buried macrocells. The switch matrix connects the PAL blocks to each other and to all input pins,