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M95M01-R

Features: Compatible with SPI bus serial interface (Positive Clock SPI modes) Schmitt trigger inputs for enhanced noise margin Single supply voltage: 1.8 V to 5.5 V High speed 5 MHz clock rate 5 ms Write time Status Register Hardware Protection of the Status Register Byte and Page Write (up to 25...

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SeekIC No. : 004407396 Detail

M95M01-R: Features: Compatible with SPI bus serial interface (Positive Clock SPI modes) Schmitt trigger inputs for enhanced noise margin Single supply voltage: 1.8 V to 5.5 V High speed 5 MHz clock rate 5 ms...

M95M01-R Data Sheet

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Part Number:
M95M01-R
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

Compatible with SPI bus serial interface (Positive Clock SPI modes)
Schmitt trigger inputs for enhanced noise margin
Single supply voltage: 1.8 V to 5.5 V
High speed
5 MHz clock rate
5 ms Write time
Status Register
Hardware Protection of the Status Register
Byte and Page Write (up to 256 bytes)
Self-timed programming cycle
Adjustable size read-only EEPROM area
Enhanced ESD Protection
More than 1 000 000 Write cycles
More than 40-year data retention
Packages ECOPACK® (RoHS compliant)


Pinout

Connection Diagram


Specifications

Symbol
Parameter
Min
Max
Unit
TA
 Ambient Operating Temperature
-40
130
°C
TSTG
 Storage Temperature
-65
150
°C
TLEAD
 Lead temperature during soldering
See note (1)
°C
VO
 Output voltage
-0.5
VCC+0.6
V
VI
 Input voltage
-0.5
6.5
V
VCC
 Supply voltage
-0.5
6.5
V
VESD
 Electrostatic discharge voltage (Human Body Model)(2)
-4000
4000
V

1. Compliant with JEDEC Std J-STD-020C (for small body, Sn-Pb or Pb assembly), the ST ECOPACK® 7191395 specification, and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU
2. AEC-Q100-002 (compliant with JEDEC Std JESD22-A114A, C1=100pF, R1=1500, R2=500)




Description

The M95M01-R is an electrically erasable programmable memory (EEPROM) device. It is accessed by a high speed SPI-compatible bus. The memory array is organized as 131 072 × 8 bit. It can also be seen as 512 pages of 256 bytes each.

The M95M01-R is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q, as shown in Table 1 and Figure 1.

The device is selected when Chip Select (S) is taken Low. Communications with the device can be interrupted using Hold (HOLD).

In order to meet environmental requirements, ST offers the M95M01-R in ECOPACK® packages. ECOPACK® packages are Lead-free and RoHS compliant.ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.




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