M82C288

The M82C288 bus controller is used in M80286 systems to provide address latch control, data transceiver control, and standard level-type command outputs. The command outputs of M82C288 are timed and have sufficient drive capabilities for large TTL buses and meet all IEEE-796 requirements for MULTIBUS I. A special MULTIBUS I mode is provided to satisfy all
address/data setup and hold time requirements. Command timing may be tailored to special needs via a CMDLY input to determine the start of a command andREADY to determine the end of a command.

Connection to multiple buses M82C288 are supported with a latched enable input (CENL). An address decoder can determine which, if any, bus controller should be enabled for the bus cycle. This input is latched to allow an address decoder to take full advantage of the pipelined timing on the M80286 local bus.

Buses shared by several bus controllers are supported. An AEN input prevents the bus controller from driving the shared bus command and data signals except when enabled by an external MULTIBUS I type bus arbiter.