Features: `ULTRA LOW DATA RETENTION CURRENT 10nA (typical) 2.0A (max)` OPERATION VOLTAGE: 5V ±10%`128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE`EQUAL CYCLE and ACCESS TIMES: 55ns`LOW VCC DATA RETENTION: 2V`TRI-STATE COMMON I/O` LOW ACTIVE and STANDBY POWER`AUTOMATIC POWER-DOWN WHEN DESELECTED`INTE...
M68Z128: Features: `ULTRA LOW DATA RETENTION CURRENT 10nA (typical) 2.0A (max)` OPERATION VOLTAGE: 5V ±10%`128Kb x 8 VERY FAST SRAM with OUTPUT ENABLE`EQUAL CYCLE and ACCESS TIMES: 55ns`LOW VCC DATA RETENT...
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DescriptionThe M68Z128W-70N1T is a 1 Mbit (1,084,576 bit) fast CMOS SRAM,organized as 131,072 word...
Symbol | Parameter | Value | Unit |
TA | Ambient Operating Temperature | 0 to 70 | °C |
TSTG | Storage Temperature | 65 to 150 | °C |
VIO (2) | Input or Output Voltage | 0.3 to VCC + 0.3 | °C |
VCC | Supply Voltage | 0.3 to 7.0 | V |
IO (3) | Output Current | 20 | V |
PD | Power Dissipation | 1 | V |
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
2. Up to a maximum operating VCC of 5.5V only.
3. One output at a time, not to exceed 1 second duration.
The M68Z128 is a 1 Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 5V ±10% supply, and all inputs and outputs are TTL compatible.