M68AW256DL

Features: ·SUPPLY VOLTAGE: 2.7 to 3.6V·256K x 16 bits SRAM with OUTPUT ENABLE·EQUAL CYCLE and ACCESS TIME: 55ns·SINGLE BYTE READ/WRITE·LOW STANDBY CURRENT·LOW VCC DATA RETENTION: 1.5V·TRI-STATE COMMON I/O·AUTOMATIC POWER DOWN·DUAL CHIP ENABLE for EASY DEPTH EXPANSIONPinoutSpecifications Symbo...

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M68AW256DL Picture
SeekIC No. : 004407008 Detail

M68AW256DL: Features: ·SUPPLY VOLTAGE: 2.7 to 3.6V·256K x 16 bits SRAM with OUTPUT ENABLE·EQUAL CYCLE and ACCESS TIME: 55ns·SINGLE BYTE READ/WRITE·LOW STANDBY CURRENT·LOW VCC DATA RETENTION: 1.5V·TRI-STATE COMM...

floor Price/Ceiling Price

Part Number:
M68AW256DL
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

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Upload time: 2024/11/27

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Product Details

Description



Features:

·SUPPLY VOLTAGE: 2.7 to 3.6V
·256K x 16 bits SRAM with OUTPUT ENABLE
·EQUAL CYCLE and ACCESS TIME: 55ns
·SINGLE BYTE READ/WRITE
·LOW STANDBY CURRENT
·LOW VCC DATA RETENTION: 1.5V
·TRI-STATE COMMON I/O
·AUTOMATIC POWER DOWN
·DUAL CHIP ENABLE for EASY DEPTH EXPANSION



Pinout

  Connection Diagram


Specifications

Symbol Parameter
Value
Unit
IO(1)

TA

TSTG

VCC

VIO(2)

PD
Output Current


Ambient Operating Temperature


Storage Temperature


Supply Voltage


Input or Output Voltage


Power Dissipation
20


55 to 125


65 to 150


0.5 to 4.6


0.5 to VCC +0.5


1
mA


°C


°C


V


V


W
Note: 1. One output at a time, not to exceed 1 second duration.
          2. Up to a maximum operating VCC of 3.6V only.



Description

The M68AW256DL is a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 262,144 words by 16 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 2.7 to 3.6V supply.

M68AW256DL has an automatic power-down feature, reducing the power consumption by over 99% when deselected. The M68AW256DL is available in TFBGA48 (0.75 mmpitch) and in TSOP44 Type II packages.




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