Features: · SUPPLY VOLTAGE: 2.7 to 3.6V· 256K x 16 bits SRAM with OUTPUT ENABLE· EQUAL CYCLE and ACCESS TIME: 55ns· SINGLE BYTE READ/WRITE· LOW STANDBY CURRENT· LOW VCC DATA RETENTION: 1.5V· TRI-STATE COMMON I/O· AUTOMATIC POWER DOWN· DUAL CHIP ENABLE for EASY DEPTH EXPANSIONPinoutSpecifications ...
M68AW256D: Features: · SUPPLY VOLTAGE: 2.7 to 3.6V· 256K x 16 bits SRAM with OUTPUT ENABLE· EQUAL CYCLE and ACCESS TIME: 55ns· SINGLE BYTE READ/WRITE· LOW STANDBY CURRENT· LOW VCC DATA RETENTION: 1.5V· TRI-STA...
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Symbol | Parameter | Value | Unit |
IO (1) | Output Current | 20 | mA |
TA | Ambient Operating Temperature | 55 to 125 | |
TSTG | Storage Temperature | 65 to 150 | |
VCC | Supply Voltage | 0.5 to 2.5 | V |
VIO (2) | Input or Output Voltage | 0.5 to VCC + 0.5 | V |
PD | Power Dissipation | 1 | W |
The M68AW256D is a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 262,144 words by 16 bits. The device features fully static operation re-quiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 2.7 to 3.6V supply. This device has an au-tomatic power-down feature, reducing the power consumption by over 99% when deselected.
The M68AW256D is available in TFBGA48 (0.75 mm pitch) and in TSOP44 Type II packages.