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M68AW128ML

Features: SUPPLY VOLTAGE: 2.7 to 3.3V 128K x 16 bits SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIME: 55ns SINGLE BYTE READ/WRITE LOW STANDBY CURRENT LOW VCC DATA RETENTION: 1.5V TRI-STATE COMMON I/O AUTOMATIC POWER DOWNPinoutSpecifications Symbol Parameter Value Unit IO(1) Output...

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SeekIC No. : 004407006 Detail

M68AW128ML: Features: SUPPLY VOLTAGE: 2.7 to 3.3V 128K x 16 bits SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIME: 55ns SINGLE BYTE READ/WRITE LOW STANDBY CURRENT LOW VCC DATA RETENTION: 1.5V TRI-STATE COMM...

M68AW128ML Data Sheet

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Part Number:
M68AW128ML
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

SUPPLY VOLTAGE: 2.7 to 3.3V
128K x 16 bits SRAM with OUTPUT ENABLE
EQUAL CYCLE and ACCESS TIME: 55ns
SINGLE BYTE READ/WRITE
LOW STANDBY CURRENT
LOW VCC DATA RETENTION: 1.5V
TRI-STATE COMMON I/O
AUTOMATIC POWER DOWN


Pinout

Connection Diagram


Specifications

Symbol Parameter Value Unit
IO(1) Output Current 20 mA
PD Power Dissipation 1 W
TSTG Storage Temperature 65 to 150 °C
VCC Supply Voltage 0.3 to 4.6 V
VIO(2) Input or Output Voltage 0.5 to VCC +0.5 V
TA Ambient Operating Temperature 55 to 125 °C
1. One output at time not to exceed 1 second duration.
2. Up to a maximum operating VCC of 3.3V only.


Description

The M68AW128ML is a 2 Mbit (2,097,152 bit) CMOS SRAM, organized as 131,072 words by 16 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 2.7 to 3.3V supply. This device has an automatic power-down feature, reducing the power consumption by over 99% when deselected.

The M68AW128ML is available in TFBGA48 (0.75 mmpitch) and in TSOP44 Type II packages.




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