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M68AR128M

Features: · SUPPLY VOLTAGE: 1.65 to 1.95V· 128K x 16 bits SRAM with OUTPUT ENABLE· EQUAL CYCLE and ACCESS TIME: 55ns· SINGLE BYTE READ/WRITE· LOW STANDBY CURRENT· LOW VCC DATA RETENTION: 1.0V· TRI-STATE COMMON I/O· AUTOMATIC POWER DOWNSpecifications Symbol Parameter Value Unit IO (1) ...

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SeekIC No. : 004406998 Detail

M68AR128M: Features: · SUPPLY VOLTAGE: 1.65 to 1.95V· 128K x 16 bits SRAM with OUTPUT ENABLE· EQUAL CYCLE and ACCESS TIME: 55ns· SINGLE BYTE READ/WRITE· LOW STANDBY CURRENT· LOW VCC DATA RETENTION: 1.0V· TRI-S...

M68AR128M Data Sheet

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Part Number:
M68AR128M
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

· SUPPLY VOLTAGE: 1.65 to 1.95V
· 128K x 16 bits SRAM with OUTPUT ENABLE
· EQUAL CYCLE and ACCESS TIME: 55ns
· SINGLE BYTE READ/WRITE
· LOW STANDBY CURRENT
· LOW VCC DATA RETENTION: 1.0V
· TRI-STATE COMMON I/O
· AUTOMATIC POWER DOWN


Specifications

Symbol Parameter Value Unit
IO (1) Output Current 20 mA
TA Ambient Operating Temperature 55 to 125
TSTG Storage Temperature 65 to 150
VCC Supply Voltage 0.5 to 2.5 V
VIO (2) Input or Output Voltage 0.5 to VCC + 0.5 V
PD Power Dissipation 1 W
Note: 1. One output at a time, not to exceed 1 second duration.
2. Up to a maximum operating VCC of 1.95V only.


Description

The M68AR128M is a 2 Mbit (2,097,152 bit) CMOS SRAM, organized as 131,072 words by 16 bits. The device features fully static operation re- quiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 1.8V (±150mV) supply. This device has an automatic power-down feature, reducing the pow- er consumption by over 99% when deselected.

The M68AR128M is available in TFBGA48 (0.75 mm pitch) package.




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