M67204E

Features:

First-in first-out dual port memory
4096 * 9 organisation
Fast access time: 40, 50 ns
Wide temperature range : 55 °C to + 125 °C
Fully expandable by word width or depth
Asynchronous read/write operations
Empty, full and half flags in single device mode
Retransmit capability
Bi-directional applications
Battery back-up operation 2 V data retention
TTL compatible
Single 5 V ± 10 % power supply
High performance SCMOS technology


Pinout




Specifications

Supply voltage (VCC GND) . . . . . . . . . . . . . . . . . . 0.3 V to 7.0 V
Input or Output voltage applied : . . . . . . . . . . . . . . (GND 0.3 V) to (Vcc + 0.3 V)
Storage temperature : . . . . . . . . . . . . . . . . . . . . . . 65 to + 150

OPERATING RANGE	OPERATING SUPPLY VOLTAGE	OPERATING TEMPERATURE
Military	Vcc = 5 V ± 10 %	55 to + 125

Description

The M67204E implement a first-in first-out algorithm, eaturing asynchronous read/write operations. The FULL nd EMPTY flags prevent data overflow and underflow. he Expansion logic  of M67204G allows unlimited expansion in word ize and depth with no timing penalties. Twin address ointers automatically generate internal read and write ddresses, and no external address information are equired for the TEMIC FIFOs. Address pointers are utomatically incremented with the write pin and read in. The 9 bits wide data are used in data communications pplications where a parity bit for error checking is ecessary. The Retransmit pin resets the Read pointer to ero without affecting the write pointer. This is very seful for retransmitting data when an error is detected in he system.

Using an array of eigh transistors (8 T) memory cell, the 67204E combine an extremely low standby supply urrent (typ = 1.0 A) with a fast access time at 40 ns ver the full temperature range. All versions offer battery ackup data retention capability with a typical power onsumption at less than 2 W.

The M67204E is processed according to the methods of he latest revision of the MIL STD 883 (class B or S), ESA CC 9000 and QML.