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M66252P

Features: • Memory construction ........................................................ ....................... 1152words x 8bits (dynamic memory)• High-speed cycle ............................................ 50ns (min.)• High-speed access .........................................

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SeekIC No. : 004406875 Detail

M66252P: Features: • Memory construction ........................................................ ....................... 1152words x 8bits (dynamic memory)• High-speed cycle .......................

M66252P Data Sheet

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Part Number:
M66252P
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• Memory construction ........................................................
          ....................... 1152words x 8bits (dynamic memory)
• High-speed cycle ............................................ 50ns (min.)
• High-speed access ........................................ 40ns (max.)
• Output hold ....................................................... 5ns (min.)
• Fully independent, asynchronous write and read operations
• Variable-length delay bit
• Output .................................................................... 3-state


Application

Digital photocopiers, high-speed facsimiles, laser beam printers.


Pinout

Connection Diagram


Specifications

Symbol
Parameter
Conditions
Rating
Unit
Vcc Supply voltage
 Reference pin: GND
-0.5to+7.0
V
VI Input voltage
0.5 toVcc+0.5
V
Vo Output voltage
0.5 toVcc+0.5
V
Pd Power dissipation Ta = 25°C
550(Note 1)
mW
Tstg Storage temperature  
-65 to +150
°C

Note 1: Ta  62°C are derated at 8.8mW/°C (24P4Y)
             Ta  51°C are derated at 7.5mW/°C (24P2W)




Description

The M66252P/FP is a high-speed line memory with a FIFO(First In First Out) structure of 1152-word × 8-bit configuration which uses high-performance silicon gate CMOS process technology.

The M66252P/FP has separate clock, enable and reset signals for write and read and is most suitable as a buffer memory between
devices with different data processing throughput.




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