M66221SP

Features: • Memory configuration of 256×9 bits• High-speed access, address access time 40ns (typ.)• Complete asynchronous accessibility from ports A and B• Completely static operation• Built-in port arbitration function• Low power dissipation CMOS design• ...

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M66221SP Picture
SeekIC No. : 004406864 Detail

M66221SP: Features: • Memory configuration of 256×9 bits• High-speed access, address access time 40ns (typ.)• Complete asynchronous accessibility from ports A and B• Completely static ...

floor Price/Ceiling Price

Part Number:
M66221SP
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

• Memory configuration of 256×9 bits
• High-speed access, address access time 40ns (typ.)
• Complete asynchronous accessibility from ports A and B
• Completely static operation
• Built-in port arbitration function
• Low power dissipation CMOS design
• 5V single power supply
• Not Readyoutput pin is provided (open drain output)
• TTL direct-coupled I/O
• 3-state output for I/O pins.



Application

Inter-MPU data transfer memory, buffer memory for image processing system.


Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Conditions
Ratings
Unit
Vcc Supply voltage
When defining GND pin as a reference.
-0.3to +7.0
V
VI Input voltage
-0.3toVcc+0.3
V
Vo Output voltage
0toVcc
V
Pd Maximum power dissipation Ta = 25 °C
800
mW
Tstg Storage temperature  
-65 to +150
°C



Description

The M66221 is a mail box that incorporates a complete CMOS shared memory cell of 256 ´ 9-bit configuration using high-performance silicon gate CMOS process technology, and is equipped with two access
ports of A and B.

Access ports A and B of M66221 are equipped with independent addresses CS,WE and OE control pins and I/O pins to allow independent and asynchronous read/write operations from/to shared memory individually. This product also incorporates a port adjustment arbitration function in address contention from both ports.




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