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M5M5V32R16J

Features: ·Fast access time M5M5V32R16J,TP-10 10ns(max)·M5M5V32R16J,TP-12 12ns(max)·M5M5V32R16J,TP-15 15ns(max)·Low power dissipation Active 297mW(typ)·Stand by 0.33mW(typ)·Single +3.3V power supply·Fully static operation : No clocks, No refresh·Common data I/O·Easy memory expansion by /S·Three-st...

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SeekIC No. : 004406335 Detail

M5M5V32R16J: Features: ·Fast access time M5M5V32R16J,TP-10 10ns(max)·M5M5V32R16J,TP-12 12ns(max)·M5M5V32R16J,TP-15 15ns(max)·Low power dissipation Active 297mW(typ)·Stand by 0.33mW(typ)·Single +3.3V power supply...

M5M5V32R16J Data Sheet

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Part Number:
M5M5V32R16J
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

·Fast access time M5M5V32R16J,TP-10 10ns(max)
·M5M5V32R16J,TP-12 12ns(max)
·M5M5V32R16J,TP-15 15ns(max)
·Low power dissipation Active 297mW(typ)
·Stand by 0.33mW(typ)
·Single +3.3V power supply
·Fully static operation : No clocks, No refresh
·Common data I/O
·Easy memory expansion by /S
·Three-state outputs : OR-tie capability
·OE prevents data contention in the I/O bus
·Directly TTL compatible : All inputs and outputs
·Separate control of lower and upper bytes by /LB and /UB


Application

High-speed memory system


Pinout

Connection Diagram


Specifications

Symbol Parameter Conditions Ratings Unit
Vcc Supply voltage With respect to GND -2.0* ~ 4.6 V
VI Input voltage -2.0* ~ Vcc+0.5 V
VO Output voltage -2.0* ~ Vcc V
Pd Power dissipation Ta=25 1000 mW
Topr Operating temperature   0 ~ 70
Tstg(bias) Storage temperature(bias)   -10 ~ 85
Tstg Storage temperature   -65 ~ 150
* Pulse width 20ns, In case of DC: - 0.5V


Description

The M5M5V32R16 is a family of 32768-word by 16-bit static RAMs, fabricated with the high performance CMOS process and designed for high speed application. These devices operate on a single 3.3V supply, and are directly TTL compatible.

They include a power down feature as well. In write and read cycles, the lower and upper bytes are able to be controled either togethe or separately by /LB and /UB.




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