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M5M29T160BVP-80

Features: `Organization ....................................1048,576 word x 16bit (M5M29GB/T161BWG)`Supply voltage............................................ VCC = 2.7~3.6V`Access time .......................................................90ns (Max.)`Power Dissipation Read .........................

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SeekIC No. : 004406181 Detail

M5M29T160BVP-80: Features: `Organization ....................................1048,576 word x 16bit (M5M29GB/T161BWG)`Supply voltage............................................ VCC = 2.7~3.6V`Access time ...............

M5M29T160BVP-80 Data Sheet

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Part Number:
M5M29T160BVP-80
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

`Organization ....................................1048,576 word x 16bit
                                                               (M5M29GB/T161BWG)
 `Supply voltage............................................ VCC = 2.7~3.6V
 `Access time .......................................................90ns (Max.)
 `Power Dissipation
               Read ......................................54 mW (Max. at 5MHz)
               (After Automatic Power saving)........... 0.33W (typ.)
               Program/Erase ..................................126 mW (Max.)
               Standby ..............................................0.33W (typ.)
               Deep power down mode.................... 0.33W (typ.)
 `Auto program for Bank(I)
        Program Time........................................... .......4ms (typ.)
        Program Unit
                       (Byte Program) ......................................1word
                       (Page Program) .................................128word
 `Auto program for Bank(II)
       Program Time.................................................. 4ms (typ.)
       Program Unit ....................................................128word
 `Auto Erase
             Erase time.............................................. 40 ms (typ.)
             Erase Unit
                  Bank(I) Boot Block ............................16Kword x 1
                  Parameter Block ...............................16Kword x 7
                  Bank(II) Main Block ..........................32Kword x 28
 `Program/Erase cycles ........................................100Kcycles
 `Boot Block
                 M5M29GB161BWG............................. Bottom Boot
                 M5M29GT161BWG................................... Top Boot
 `Other Functions
                Soft Ware Command Control
                Selective Block Lock
                Erase Suspend/Resume
                Program Suspend/Resume
                Status Register Read
                Alternating Back Ground Program/Erase Operation
                   Between Bank(I) and Bank(II)
 `Package
              7mm x 8.5mm CSP (Chip Scale Package)
             - 6 x 8 balls, 0.75mm ball pitch



Pinout

Connection Diagram


Specifications

Symbol
Parameter
Conditions
Min
Max
Unit
VCC Vcc voltage
With respect to Ground
-0.2
4.6
V
VI1 All input or output voltage 1)
-0.6
4.6
V
Ta Ambient temperature
-40
85
Tbs Temperature under bias
-50
95
Tstg Storage temperature
-65
125
IOUT Output short circuit current
100
mA
1) Minimum DC voltage is -0.5V on input/output pins. During transitions, this level may undershoot to -2.0V for periods <20ns. Maximum DC voltage on input/output pins is VCC+0.5V which, during transitions, may overshoot to VCC+1.5V for periods <20ns.


Description

The MITSUBISHI Mobile FLASH M5M29GB/T160BVP are 3.3V-only high speed 16,777,216-bit CMOS boot block Flash Memories with alternating BGO (Back Ground Operation) feature. The BGO feature of the device allows Program or Erase operations to be performed in one bank while the device simultaneously allows Read operations to be performed on the other bank. This BGO feature is suitable for mobile and personal computing, and communication products. The M5M29GB/T160BVP are fabricated by CMOS technology for the peripheral circuits and DINOR(Divided bit line NOR) architecture for the memory cells, and are available in in 48pin TSOP(I) .




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