M54HCT573

The M54/74HCT563 and M54HCT573 are high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with silicon gate C²MOS technology.

These ICs M54/74HCT563 and M54HCT573 achive the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

These 8 bit D-Type latches M54/74HCT563 and M54HCT573 are controlled by a latch enable input (LE) and a output enable input (OE). While the LE input is held at a high level, the Q outputs will follow the data input precisely or inversely. When the LE is taken low, the Q outputs will be latched precisely or inversely at the logic level of D input data. While the OE input is at low level,the eight outputs will be in a normal logic state (high or low logic level) and while high level the outpts will be in a high impedance state.

The application designer M54/74HCT563 and M54HCT573 has a choise of combination of inverting and non inverting outputs. This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC²MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption.

M54/74HCT563 and M54HCT573 All inputs are equipped with protection circuits against discharge and transient excess voltage.