Features: HIGH SPEED fMAX = 65 MHz (TYP.) AT VCC = 5 V LOWPOWER DISSIPATION ICC = 2 A (MAX.) AT 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCEDPROPAGATION DELAYS tPLH = tPHL HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) WIDE OPERATING ...
M54HC76: Features: HIGH SPEED fMAX = 65 MHz (TYP.) AT VCC = 5 V LOWPOWER DISSIPATION ICC = 2 A (MAX.) AT 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALA...
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Symbol |
Parameter |
Value |
Unit |
VCC |
Supply Voltage |
-0.5 to +7 |
V |
VI |
DC Input Voltage |
-0.5 to VCC + 0.5 |
V |
VO |
DC Output Voltage |
-0.5 to VCC + 0.5 |
V |
IIK |
DC Input Diode Current |
± 20 |
mA |
IOK |
DC Output Diode Current |
± 20 |
mA |
IO |
DC Output Source Sink Current Per Output Pin |
± 25 |
mA |
ICC or IGND |
DC VCC or Ground Current |
± 50 |
mA |
PD |
Power Dissipation |
500 (*) |
mW |
Tstg |
Storage Temperature |
-65 to +150 |
°C |
TL |
Lead Temperature (10 sec) |
300 |
°C |
The M54/74HC76 is a high speed CMOSDUAL J-K FLIP FLOP fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Depending on with the logic level at the J and Kinputs this device changes state on the negative going transition of the clock pulse. CLEAR and PRESET are independent of the clock and are accomplished by a logic low on the corresponding input. All inputs are equipped with protection circuits against static discharge and transient excess voltage.