Features: ·HIGH SPEED fMAX = 71 MHz (TYP.) AT VCC = 5 V· LOWPOWER DISSIPATION ICC = 4 mA (MAX.) at TA = 25 °C·HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) ·OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ·SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.) ·BALANCEDPROPAGATION DELAYS tPLH = tPHL· W...
M54HC74: Features: ·HIGH SPEED fMAX = 71 MHz (TYP.) AT VCC = 5 V· LOWPOWER DISSIPATION ICC = 4 mA (MAX.) at TA = 25 °C·HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) ·OUTPUT DRIVE CAPABILITY 10 LSTTL LOAD...
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Symbol | Parameter | Value | Unit |
VCC | Supply Voltage | -0.5 to +7 | V |
VI | DC Input Voltage | -0.5 to VCC + 0.5 | V |
VO | DC Output Voltage | -0.5 to VCC + 0.5 | V |
IIK | DC Input Diode Current | ± 20 | mA |
IOK | DC Output Diode Current | ± 20 | mA |
IO | DC Output Current | ± 25 | mA |
ICC or IGND | DC VCC or Ground Current | ± 50 | mA |
PD | Power Dissipation | 500(*) | mW |
Tstg | Storage Temperature | -65 to +150 | °C |
TL | Lead Temperature (10 sec) | 300 | °C |
AbsoluteMaximumRatings are those values beyond whichdamage tothe device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW: 65 derate to 300mWby 10mW/: 65 to85
The M54/74HC74 is a high speed CMOS DUAL D TYPE FLOP WITH PRESET AND CLEAR fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with trueCMOSlow power consumption. Asignal on the DINPUT is transferred to the QOUTPUTduring the positive going transition of the clock pulse. CLEAR and PRESET are independent of the clock and accomplished by alow on the appropriate input. All inputs are equipped with protection circuits against static discharge and transient excess voltage.