M54HC692

PinoutSpecifications Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current ± 20 mA IOK DC Output Diode Current ...

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M54HC692 Picture
SeekIC No. : 004405935 Detail

M54HC692: PinoutSpecifications Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5...

floor Price/Ceiling Price

Part Number:
M54HC692
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
Supply Voltage
-0.5 to +7
V
VI
DC Input Voltage
-0.5 to VCC + 0.5
V
VO
DC Output Voltage
-0.5 to VCC + 0.5
V
IIK
DC Input Diode Current
± 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Source Sink Current Per
Output Pin
RCO
± 25
mA
QA to QD
± 35
ICC or IGND
DC VCC or Ground Current
± 70
mA
PD
Power Dissipation
500 (*)
mW
Tstg
Storage Temperature
-65 to +150
oC
TL
Lead Temperature (10 sec)
300
oC



Description

The HC690/691/692/693 are high speed CMOS COUNTER/REGISTER fabricated in silicon gate C2MOS technology.

HC690/691/692/693 have the same high speed performance of LSTTL combined with true CMOS low power consumption.

The HC690/691/692/693 internal circuit is composed of 3 stages including buffer output, which offers high noise immunity and stable output. These devices incorporate a synchronous counter, four-bit D-type register, and quadruple two-line to one-line multiplexers with three-state outputs in a single 20-pin package. The counter can be programmed from the data inputs and have enable P and enable Tinputs and a ripplecarry output for easy expansion. The register/ counter select input, R/C, selects the counter when low or the register when high for the threestate outputs, QA, QB, QC, and QD.

If the HC690/691/692/693 LOADinput (LOAD)is held "L" DATA input (AD) are loaded in to the internal counter at positive edge of counter clock input (CCK). In the counter mode, internal counter counts up at the positive of the counter clock. If the counter clear input (CCLR) is held "L", the internal counter is cleared ( synchronously to the counter clock for HC692/HC693, and asynchronously for HC690/HC691). The internal counter's outputs are stored in the output register at the positive edge of the register clock (RCK). If the register clear input (RCLR) is held "L" the register is cleared (synchronously to register clock for HC692/HC693 and asynchronously for HC690/HC691). All inputs are equipped with protection circuits against static discharge and transient excess voltage.




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