PinoutSpecifications Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current ± 20 mA IOK DC Output Diode C...
M54HC533: PinoutSpecifications Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -...
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Symbol |
Parameter |
Value |
Unit |
VCC |
Supply Voltage |
-0.5 to +7 |
V |
VI |
DC Input Voltage |
-0.5 to VCC + 0.5 |
V |
VO |
DC Output Voltage |
-0.5 to VCC + 0.5 |
V |
IIK |
DC Input Diode Current |
± 20 |
mA |
IOK |
DC Output Diode Current |
± 20 |
mA |
IO |
DC Output Source Sink Current Per Output Pin |
± 35 |
mA |
ICC or IGND |
DC VCC or Ground Current |
± 75 |
mA |
PD |
Power Dissipation |
500 (*) |
mW |
Tstg |
Storage Temperature |
-65 to +150 |
|
TL |
Lead Temperature (10 sec) |
300 |
The M54/74HC373/533 are high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with in silicon gate C2MOS technology.
These ICs M54/74HC373/533 achive the high speed operation similar to equivalent LSTTL while maintaning the CMOS low power dissipation.
These M54/74HC373/533 8 bit D-Type latches are controlled by a latch enable input (LE) and a output enable input (OE).
While the M54/74HC373/533 LE input is held at a high level, the Q outputs will follow the data input precisely or inversely. When the LE is taken low, the Q outputs will be latched precisely or inversely at the logic level of D input data. While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic level) and while high level the outpts will be in a high impedance state.
The application designer M54/74HC373/533 has a choise of combination of inverting and non inverting outputs.
The M54/74HC373/533 three state output configuration and the wide choise of outline make bus organized system simple.
M54/74HC373/533 All inputs are equipped with protection circuits against discharge and transient excess voltage.