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M54HC4022

Features: HIGH SPEED fMAX = 57 MHz (TYP.) at VCC = 5 V LOWPOWER DISSIPATION ICC 4 A (MAX.) at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADSSYMMETRICAL OUTPUT IMPEDANCE IOH| = IOL = 4 mA (MIN.) BALANCEDPROPAGATION DELAYS tPLH = tPHL WIDE OPERATI...

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SeekIC No. : 004405895 Detail

M54HC4022: Features: HIGH SPEED fMAX = 57 MHz (TYP.) at VCC = 5 V LOWPOWER DISSIPATION ICC 4 A (MAX.) at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADSSYMME...

M54HC4022 Data Sheet

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Part Number:
M54HC4022
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

HIGH SPEED fMAX = 57 MHz (TYP.) at VCC = 5 V
LOWPOWER DISSIPATION ICC 4 A (MAX.) at TA = 25 °C
HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)
OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS
SYMMETRICAL OUTPUT IMPEDANCE IOH| = IOL = 4 mA (MIN.)
BALANCEDPROPAGATION DELAYS tPLH = tPHL
WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V to 6 V
PIN AND FUNCTION COMPATIBLE WITH 4022B


Pinout

Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
 Supply Voltage
-0.5 to +7
V
VI
 DC Input Voltage
-0.5 to VCC + 0.5
V
VO
DC Output Voltage
-0.5 to VCC + 0.5
V
IIK
 DC Input Diode Current
± 20
mA
IOK
 DC Output Diode Current
± 20
mA
IO
 DC Output Source Sink Current Per Output Pin
± 25
mA
ICC or IGND
 DC VCC or Ground Current
± 50
mA
PD
 Power Dissipation
500 (*)
mW
Tstg
 Storage Temperature
-65 to +150
°C
TL
 Lead Temperature (10 sec)
300
°C
AbsoluteMaximumRatings are those values beyond whichdamage tothe device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW: 65 derate to 300mWby 10mW/: 65 to85


Description

The M54/74HC4022 is a high speedCMOSOCTAL COUNTER/DIVIDER fabricated in silicon gate C2MOS technology.

M54/74HC4022 has the same high speed performance of LSTTL combined with true CMOS low power consumption. It contains a 4-stage divide-by-8 Johnson counter with 8 decoded outputs (Q0-Q7) and a Carry-out bit. This counter is advanced on the positive edge of the clock signal when CLOCK ENABLE input is held low, or is advanced on the negative edge of clock enable signal when CLOCK input is held high, and the selected one of eight outputs goes high. Holding the CLEAR input high clears the counter to zero regardless of the other input conditions. All inputs are equipped with protection circuits against static discharge and transient excess voltage.




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