M54HC241

Features: HIGH SPEED tPD = 10 ns (TYP.) at VCC = 5VLOWPOWER DISSIPATION ICC = 4 A (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY VNIH = VINL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 6 mA (MIN) BALANCEDPROPAGATION DELAYS tPLH = tPHL WIDE OPERATIN...

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M54HC241 Picture
SeekIC No. : 004405854 Detail

M54HC241: Features: HIGH SPEED tPD = 10 ns (TYP.) at VCC = 5VLOWPOWER DISSIPATION ICC = 4 A (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY VNIH = VINL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS SYMMET...

floor Price/Ceiling Price

Part Number:
M54HC241
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

 HIGH SPEED tPD = 10 ns (TYP.) at VCC = 5V
 LOWPOWER DISSIPATION ICC = 4 A (MAX.) at TA = 25 oC
 HIGH NOISE IMMUNITY VNIH = VINL = 28 % VCC (MIN.)
 OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS
 SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 6 mA (MIN)
 BALANCEDPROPAGATION DELAYS tPLH = tPHL
 WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2V to 6V
 PIN AND FUNCTION COMPATIBLE WITH 54/74LS240/241/244



Pinout

  Connection Diagram




Specifications

Symbol Parameter Value Unit
VCC Supply Voltage -0.5 to +7 V
VI DC Input Voltage -0.5 to VCC + 0.5 V
VO DC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current ± 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Source Sink Current Per Output Pin ± 35 mA
ICC or IGND DC VCC or Ground Current ± 70 mA
PD Power Dissipation 500 (*) mW
Tstg Storage Temperature -65 to +150 °C
TL Lead Temperature (10 sec) 300 °C
AbsoluteMaximumRatings are those values beyond whichdamage tothe device may occur. Functional operation under these condition isnotimplied. (*) 500 mW:  65 oC derate to 300mWby 10mW/°C: 65 oC to85oC


Description

The M54/74HC240, HC241 and HC244 are high speed CMOS OCTAL BUS BUFFERs fabricated in silicon gate C2MOS technology.

The M54/74HC240, HC241 and HC244 have the same high speed performance of LSTTL combined with true CMOS low power consumption.

The designer has a choise of select combination of inverting and non-inverting outputs, symmetrical G (active low output control) input, and complementary G and G inputs. Each control input governs four BUS BUFFERs.

These devices are designed to be used with 3 state memory address drivers, etc. All inputs are equipped with protection circuits against static discharge and transient excess voltage.


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