M54HC164

Features:

.HIGH SPEED
t_PD = 15 ns (TYP.) AT V_CC = 5 V
.LOWPOWER DISSIPATION
I_CC = 4 mA (MAX.) AT TA = 25 °C
.OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.BALANCEDPROPAGATION DELAYS
t_PLH = t_PHL
.SYMMETRICAL OUTPUT IMPEDANCE
I_OL = _IOH = 4 mA (MIN.)
.HIGH NOISE IMMUNITY
V_NIH= V_NIL= 28%VCC (MIN.)
.WIDE OPERATING VOLTAGE RANGE
V_CC (OPR) = 2 V TO 6 V
.PIN AND FUNCTION COMPATIBLE
WITH 54/74LS164


Pinout




Specifications

Symbol	Parameter	Value	Unit
VCC	Supply Voltage	-0.5 to +7	V
VI	DC Input Voltage	-0.5 to VCC + 0.5	V
VO	DC Output Voltage	-0.5 to VCC + 0.5	V
IIK	DC Input Diode Current	± 20	mA
IOK	DC Output Diode Current	± 20	mA
IO	DC Output Source Sink Current Per Output Pin	± 25	mA
ICC or IGND	DC VCC or Ground Current	± 50	mA
PD	Power Dissipation	500 (*)	mW
Tstg	Storage Temperature	-65 to +150	oC
TL	Lead Temperature (10 sec)	300	oC

Description

  The M54/74HC164 is a high speed CMOS 8 BIT SIPO SHIFT REGISTER fabricated in silicon gate C2MOStechnology. It has the same highspeed performance of LSTTL combined with true CMOS low power consumption.

  The M54/74HC164 is an 8 bit shift register with serial data entry and an output from each of the eight stages.Data is entered serially through one of two inputs (A or B), either of these inputs can be used as an active high enable for data entry through the other input.

  M54/74HC164  An unused input must be high, or both inputs connected together. Each low-to-high transition on the clock input shifts data one place to the right and entersintoQA, thelogic NANDof the twodata inputs (A.B ), the data that existed before the rising clock edge. A low level on the clear input overrides all other inputs and clears the register asynchronously, forcing all Q outputs low.

  M54/74HC164 All inputs are equipped with protection circuits against static discharge and transient excess voltage.