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M54HC154

Features: HIGH SPEED tPD = 16 ns (TYP.) AT VCC =6 VLOWPOWER DISSIPATION ICC = 4A (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCEDPROPAGATION DELAYS tPLH tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN ...

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SeekIC No. : 004405825 Detail

M54HC154: Features: HIGH SPEED tPD = 16 ns (TYP.) AT VCC =6 VLOWPOWER DISSIPATION ICC = 4A (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA ...

M54HC154 Data Sheet

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Part Number:
M54HC154
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

HIGH SPEED tPD = 16 ns (TYP.) AT VCC = 6 V
LOWPOWER DISSIPATION ICC = 4A (MAX.) AT TA = 25 °C
HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)
SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.)
BALANCEDPROPAGATION DELAYS tPLH  tPHL
WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V
PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 154
SPACE GRADE-1: ESA SCC QUALIFIED
50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST
NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION
DEVICE FULLY COMPLIANT WITH SCC-9205-023


Pinout

Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
 Supply Voltage
-0.5 to +7
V
VI
 DC Input Voltage
-0.5 to VCC + 0.5
V
VO
DC Output Voltage
-0.5 to VCC + 0.5
V
IIK
 DC Input Diode Current
± 20
mA
IOK
 DC Output Diode Current
± 20
mA
IO
 DC Output Source Sink Current Per Output Pin
± 25
mA
ICC or IGND
 DC VCC or Ground Current
± 50
mA
PD
 Power Dissipation
500 (*)
mW
Tstg
 Storage Temperature
-65 to +150
°C
TL
 Lead Temperature (10 sec)
265
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied


Description

The M54HC154 is an high speed CMOS 4 TO 16 LINE DECODER/DEMULTIPLEXER fabricated with silicon gate C2MOS technology. A binary code applied to the four inputs (A to D) provides a low level at the selected one of sixteen outputs excluding the other fifteen outputs, when both the strobe inputs, G1 and G2, are held low. When either strobe input is held high, the decoding function is inhibited to keep all outputs high. The strobe function makes it easy to expand the decoding lines through cascading, and simplifies the design of address decoding circuits in memory control systems.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.




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